Abstract: A driving circuit which includes a plurality of MOS transistors electrically connected in parallel between a first node and a second node, and drives a load electrically connected between the first node and a third node by the plurality of MOS transistors, wherein the plurality of MOS transistors include at least two MOS transistors having channel lengths different from each other and thus having threshold voltages different from each other.

Abstract: An electronic apparatus includes: a touch panel, a content storage unit that stores content to be displayed on the touch panel in different languages; a selected language storage unit that stores a selected language; a content display unit that displays, on the touch panel, content in the selected language stored in the selected language storage unit, from pieces of content stored in the content storage unit in the languages; and a language setting unit that displays a language selection screen on the touch panel if a particular operation is accepted in a non-explicit area, which is not explicitly indicated as being ready for accepting an operation, the language selection screen being one of screens displayed on the touch panel, and also stores, in the selected language storage unit, a language selected by an operation accepted on the language selection screen.

Abstract: In a multi processing system, packet routing units are arranged in respective middleware layers in first nodes corresponding to memory spaces connected to plural processor cores and perform routing of a packet among parent nodes and child nodes in a tree. The child nodes are user nodes that are objects of respective application layers in the memory spaces. The first nodes are the parent nodes. The user nodes, the first nodes, and a second node in the tree are assigned addresses that identify parent-child relationship of nodes in the tree. The second node is a parent node of the first nodes. The packet routing unit (a1) stores the packet if the source address is identical to an own node address, (a2) transfers the packet to a child node if the source address indicates the child node, and (a3) transfers the packet to a parent node in the other cases.

Abstract: A driving circuit which includes a plurality of MOS transistors electrically connected in parallel between a first node and a second node, and drives a load electrically connected between the first node and a third node by the plurality of MOS transistors, wherein the plurality of MOS transistors include at least two MOS transistors having channel lengths different from each other and thus having threshold voltages different from each other.