Patents by Inventor Wataru Saito

Wataru Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200318010
    Abstract: An object of the present invention is to provide a polarizer having a high degree of alignment and an image display device including the polarizer. The polarizer of the present invention is a polarizer which is formed of a polarizer-forming composition containing a polymer liquid crystal compound and a dichroic material, in which the polymer liquid crystal compound is a thermotropic liquid crystal and a crystalline polymer, the polymer liquid crystal compound and the dichroic material are horizontally aligned, and crystallinity of the polymer liquid crystal compound in the polarizer-forming composition is higher than the crystallinity of the polymer liquid crystal compound alone.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Applicant: FUJIFILM Corporation
    Inventors: Wataru HOSHINO, Yoshiaki TAKADA, Kengo SAITO
  • Publication number: 20200309824
    Abstract: The present invention provides a current detection circuit, semiconductor device, and a semiconductor system suitable for improving a current sensing accuracy. According to one embodiment, the current detection circuit 12 comprises a sense transistor Tr11 through which a first sense current proportional to the current flowing through the drive transistor MN1 flows, an operational amplifier AMP1 for amplifying the potential difference of the voltage of the external output terminal OUT and the source voltage of the sense transistor Tr11 for outputting the first sense current, a transistor Tr12 provided in series with the sense transistor Tr11 and to which the output voltage of the operational amplifier AMP1 is applied to the gate, and a switch SW3 provided between the external output terminal OUT and the source of the sense transistor Tr11 and turned on when the drive transistor MN1 is turned off.
    Type: Application
    Filed: March 16, 2020
    Publication date: October 1, 2020
    Inventors: Keisuke KIMURA, Hideyuki TAJIMA, Wataru SAITO
  • Publication number: 20200239425
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Application
    Filed: April 9, 2020
    Publication date: July 30, 2020
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Patent number: 10725087
    Abstract: To provide a semiconductor integrated device capable of a gate screening test with no need for any additional circuit and without adding any gate screening terminal. The semiconductor integrated device includes a gate drive unit configured to drive the gate of a voltage controlled semiconductor element and a regulator configured to supply a gate drive voltage to the gate drive unit. The regulator includes an external connection terminal capable of receiving a gate screening voltage for the voltage controlled semiconductor element in a gate screening test.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: July 28, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Mori, Hitoshi Sumida, Masahiro Sasaki, Akira Nakamori, Masaru Saito, Wataru Tomita, Osamu Sasaki
  • Patent number: 10654821
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: May 19, 2020
    Assignee: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Patent number: 10570109
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: February 25, 2020
    Assignee: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Publication number: 20200018879
    Abstract: An object of the invention is to provide an anisotropic light absorption film having both a high alignment degree and high light resistance, and a laminate provided using the anisotropic light absorption film. An anisotropic light absorption film according to the embodiment of the invention is formed from a composition having a first dichroic azo dye, a second dichroic azo dye, and a compound represented by Formula (I) or a polymer thereof, the first dichroic azo dye has a solution absorption maximum wavelength of 400 nm or greater and less than 550 nm, the second dichroic azo dye has a solution absorption maximum wavelength of 550 nm or greater and 750 nm or less, and the film has an arrangement structure of the first dichroic azo dye or an arrangement structure of the second dichroic azo dye therein.
    Type: Application
    Filed: September 25, 2019
    Publication date: January 16, 2020
    Applicant: FUJIFILM Corporation
    Inventors: Yumi KATOU, Shinichi MORISHIMA, Wataru HOSHINO, Jun TAKEDA, Kengo SAITO, Yuzo FUJIKI
  • Publication number: 20200002302
    Abstract: An object of the present invention is to provide a compound having an anti-inflammatory activity or a pharmacologically acceptable salt thereof. The solution of the present invention is a compound of general formula (1) or a pharmacologically acceptable salt thereof. wherein the symbols in the formula are defined below: R1: e.g., a C1-C6 alkyl group; R2: a C1-C6 alkyl group; A: e.g., an oxygen atom; and R3: e.g., a C1-C6 alkyl group.
    Type: Application
    Filed: September 5, 2019
    Publication date: January 2, 2020
    Applicant: Daiichi Sankyo Company, Limited
    Inventors: Keiji Saito, Katsuyoshi Nakajima, Toru Taniguchi, Osamu Iwamoto, Satoshi Shibuya, Yasuyuki Ogawa, Kazumasa Aoki, Nobuya Kurikawa, Shinji Tanaka, Momoko Ogitani, Eriko Kioi, Kaori Ito, Natsumi Nishihama, Tsuyoshi Mikkaichi, Wataru Saitoh
  • Patent number: 10375254
    Abstract: An image forming apparatus includes a plurality of image formers each capable of forming, on a sheet, an overlap image and a non-overlap image, a fixer that fixes, on the sheet, a whole image composed of the overlap images and the non-overlap images, and a hardware processor that controls each of the plurality of image formers such that a difference in image at a boundary between the overlap image and the non-overlap image is reduced in the whole image.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: August 6, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventors: Natsuko Minegishi, Wataru Watanabe, Hiroshi Morimoto, Keiki Katsumata, Kazuhiro Saito, Hiroki Shibata, Daiki Watanabe
  • Publication number: 20190190359
    Abstract: A manufacturing apparatus of an electrical rotating machine includes a coil segment shaping section for shaping a linear wire rod with a predetermined length into a coil segment with a predetermined shape consisting of a pair of slot insertion port ions extending substantially in parallel with each other and a linking portion for coupling the pair of slot insertion portions, and a coil assembling section for assembling a coil by circularly arranging the coil segments shaped in the coil segment shaping section. The coil segment shaping section and the coil assembling section are constituted to continuously perform the shaping and the assembling of the coil segment in each coil segment unit, based on control data set depending on a coil to be fabricated.
    Type: Application
    Filed: February 21, 2019
    Publication date: June 20, 2019
    Applicant: ODAWARA ENGINEERING CO., LTD.
    Inventors: Noburo Miyawaki, Takayuki Mochizuki, Yuji Miyazaki, Wataru Wakui, Hisayoshi Watanabe, Kodai Kono, Daiki Saito, Ryo Honda, Tomohiro Ishizuka
  • Patent number: 10302681
    Abstract: According to one embodiment, a current detection circuit (12) includes: a detection resistor (Rs) provided between a solenoid valve (106) and a solenoid driver (11); an amplification unit (121) configured to amplify a detected voltage of the detection resistor (Rs); an AD converter (122) that is driven by a reference voltage (Vref) generated based on a reference current (Iref) and configured to convert an output voltage from the amplification unit (121) into a digital value and output the digital value as a detected current value (D1); and a correction unit configured to perform a correction on the detected current value (D1).
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: May 28, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Masanori Otsuka, Wataru Saito, Yoshitaka Jingu, Yasuhiko Kokami, Satoshi Kondo, Junya Horishima
  • Patent number: 9905689
    Abstract: A semiconductor device comprising: a first electrode; a first semiconductor region; a second semiconductor region; a third semiconductor region; a fourth semiconductor region; a fifth semiconductor region; an insulating portion that is provided between the second semiconductor region and the fifth semiconductor region and between the third semiconductor region and the fifth semiconductor region; a sixth semiconductor region; a seventh semiconductor region; a gate electrode; a gate insulating layer; a second electrode; and a third electrode that is provided on the third semiconductor region and electrically connected to the third semiconductor region and the gate electrode.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: February 27, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Wataru Saito
  • Publication number: 20170368694
    Abstract: A robot hand is designed to open or close fingers using a linear actuator disposed in a housing. The robot hand has linear motion shafts extending from inside to outside the housing through guide holes formed in a wall of the housing. Each of the fingers includes a base portion and a tip portion. The base portions are secured to the linear motion shafts outside the housing. The tip portions are bent inwardly from the base portions in directions in which they approach each other and then extend toward tips of the fingers. A sealing member is disposed between each of the linear motion shafts and a corresponding one of the guide holes to hermetically isolate the inside of the housing from the outside thereof. This structure achieves an increased degree of sealing of the housing and is capable of having an increased opening or closing stroke of the fingers.
    Type: Application
    Filed: June 26, 2017
    Publication date: December 28, 2017
    Applicant: DENSO WAVE INCORPORATED
    Inventor: Wataru SAITO
  • Publication number: 20170369833
    Abstract: A bottle includes a body, a cap mounted to a cap neck of the body. The cap has an outer peripheral portion which is provided with a protrusion. Around the cap, there is provided a position indicator indicating whether the cap is at a correctly closed position, based on the positional relationship between the protrusion and the position indicator.
    Type: Application
    Filed: June 27, 2017
    Publication date: December 28, 2017
    Applicants: DENSO WAVE INCORPORATED, ANIMAL STEM CELL
    Inventors: Koji KAMIYA, Wataru SAITO, Kazuhiro NAGAIKE
  • Publication number: 20170212154
    Abstract: According to one embodiment, a current detection circuit (12) includes: a detection resistor (Rs) provided between a solenoid valve (106) and a solenoid driver (11); an amplification unit (121) configured to amplify a detected voltage of the detection resistor (Rs); an AD converter (122) that is driven by a reference voltage (Vref) generated based on a reference current (Iref) and configured to convert an output voltage from the amplification unit (121) into a digital value and output the digital value as a detected current value (D1); and a correction unit configured to perform a correction on the detected current value (D1).
    Type: Application
    Filed: January 9, 2017
    Publication date: July 27, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Masanori OTSUKA, Wataru SAITO, Yoshitaka JINGU, Yasuhiko KOKAMI, Satoshi KONDO, Junya HORISHIMA
  • Publication number: 20170141224
    Abstract: A semiconductor device comprising: a first electrode; a first semiconductor region; a second semiconductor region; a third semiconductor region; a fourth semiconductor region; a fifth semiconductor region; an insulating portion that is provided between the second semiconductor region and the fifth semiconductor region and between the third semiconductor region and the fifth semiconductor region; a sixth semiconductor region; a seventh semiconductor region; a gate electrode; a gate insulating layer; a second electrode; and a third electrode that is provided on the third semiconductor region and electrically connected to the third semiconductor region and the gate electrode.
    Type: Application
    Filed: September 9, 2016
    Publication date: May 18, 2017
    Inventor: Wataru Saito
  • Publication number: 20170040414
    Abstract: A semiconductor device according to an embodiment includes a first semiconductor region of a first conductivity type, a first insulating unit, a conductive unit, a stacked body, a fourth semiconductor region of a second conductivity type, a fifth semiconductor region of the first conductivity type, a gate electrode, and a gate insulating unit. The stacked body includes multiple second semiconductor regions of the first conductivity type and multiple third semiconductor regions of the second conductivity type. The multiple third semiconductor regions are connected to the conductive unit. The third semiconductor regions are provided alternately with the second semiconductor regions in a first direction from the first semiconductor region toward the portion of the first insulating unit. The gate electrode is provided on one other portion of the first insulating unit. The stacked body is positioned between the gate electrode and the conductive unit in a second direction.
    Type: Application
    Filed: January 19, 2016
    Publication date: February 9, 2017
    Inventor: Wataru Saito
  • Patent number: 9437728
    Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: September 6, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Syotaro Ono, Toshiyuki Naka, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
  • Patent number: RE46799
    Abstract: A power semiconductor device is disclosed, which comprises a semiconductor layer including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, which are periodically formed in the lateral direction, and a power semiconductor element including the semiconductor layers that are formed periodically, wherein a distribution of an amount of an impurity in a vertical direction of the first semiconductor layer differs from a distribution of an amount of an impurity in the vertical direction of the second semiconductor layer.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: April 17, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru Saito, Ichiro Omura, Kozo Kinoshita
  • Patent number: RE47641
    Abstract: A semiconductor device includes a first-conductivity-type semiconductor layer which includes a cell region portion and a junction terminating region portion. The junction terminating region portion is a region portion which is positioned in an outer periphery of the cell region portion to maintain a breakdown voltage by extending a depletion layer to attenuate an electric field.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: October 8, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masakazu Yamaguchi, Wataru Saito, Ichiro Omura, Masaru Izumisawa