Abstract: A memory cell circuit, a memory cell array structure and a manufacturing method thereof are provided. The memory cell circuit includes a first transistor, a second transistor and a capacitor. The first transistor has a first end electrically coupled to a bit line, and a gate of the first transistor is electrically coupled to a primary word line. The second transistor has a first end electrically coupled to a second end of the first transistor, and a gate of the second transistor is electrically coupled to an auxiliary word line. A first end of the capacitor is electrically coupled to a second end of the second transistor and a second end of the capacitor receives a reference voltage.

Abstract: A method of evaluating a thickness of a film on a substrate includes detecting atomic force responses of the film to exposure of electromagnetic radiation in the infrared portion of the electromagnetic spectrum. The use of atomic force microscopy to evaluate thicknesses of thin films avoids underlayer noise commonly encountered when optical metrology techniques are utilized to evaluate film thicknesses. Such underlayer noise adversely impacts the accuracy of the thickness evaluation.

Abstract: A three-dimensional isolator for vibration-seismic dual control. The three-dimensional isolator comprises an isolator body and isolator components, wherein the isolator body comprises a plurality of middle-layer connecting plates and a plurality of rubber module units, the middle-layer connecting plates are vertically arranged at intervals, and the rubber module units are arranged on the upper surfaces and the lower surfaces of the middle-layer connecting plates in parallel and connect the middle-layer connecting plates into a whole; and the isolator components comprise cover plate components and pre-tightening pieces, the cover plate components comprise an upper cover plate, a lower cover plate and side walls which define an isolator cavity, a flange plate is arranged on the top of the side wall, a gap is reserved between the upper cover plate and the flange plate.

Abstract: Backside interconnect structures having reduced critical dimensions for semiconductor devices and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure over a front-side of a substrate; a first backside interconnect structure over a backside of the substrate, the first backside interconnect structure including first conductive features having tapered sidewalls with widths that narrow in a direction away from the substrate; a power rail extending through the substrate, the power rail being electrically coupled to the first conductive features; and a first source/drain contact extending from the power rail to a first source/drain region of the first transistor structure.

Abstract: Particulate deposition rate on a photolithographic mask, particularly of tin (Sn) particles produced within an EUV light source, is reduced by producing turbulence within a radiation source chamber of the EUV light source. Turbulence can be produced by changing the temperature, pressure, and/or gas flow rate within the radiation source chamber. The turbulence reduces the number of particles exiting the EUV light source which could be deposited on the photomask.

Abstract: A semiconductor device including a first oxide definition (OD) strip doped by a first-type dopant in a first doping region defining an active region of a first Metal-Oxide Semiconductor (MOS); a second OD strip doped by a second-type dopant in a second doping region and a third doping region, the second doping region defining an active region of a second MOS and the third doping region defining a body terminal of the first MOS, wherein the second OD is parallel to the first OD strip; and a first dummy OD strip, wherein a boundary between the second doping region and the third doping region is formed over the first dummy OD strip; wherein the first-type dopant is different from the second-type dopant.

Abstract: Systems and methods are described for refining motion compensated predictions in block-based video coding. In an example embodiment, motion-compensated prediction is used to generate predicted sample values in a current block of samples. A precision difference value and a motion vector refinement for the current block are signaled in the bitstream. For each sample in the current block, a spatial gradient is calculated at the sample, and a scalar product is calculated between the spatial gradient and the motion vector refinement. The scalar product is scaled (e.g. bit-shifted) by an amount indicated by the precision difference value to generate a sample difference value, and the sample difference value is added to the predicted sample value to generate a refined sample value.

Abstract: The present disclosure discloses a three-dimensional integration system of an RFID chip and a supercapacitor and a manufacturing method thereof.

Abstract: A video camera comprises a housing (102) configured of a top housing portion (104), a mid-housing portion (106) and a bottom housing portion (108). The top housing portion is configured as a circular and rounded exterior contoured wall (110) having an exterior recessed feature (112) formed along an edge (114). The mid-housing portion (106) is formed of an IR window ring (116) having an alignment tab (118) extending therefrom, the alignment tab being aligned and recessed within the exterior recessed feature (112) of the rounded exterior contoured wall (110) of the top housing portion (104), and the bottom housing portion (108) providing a camera dome (120) seated within and protruding from the IR window ring (116).

Abstract: In an embodiment, a device includes: a substrate; a first semiconductor region extending from the substrate, the first semiconductor region including silicon; a second semiconductor region on the first semiconductor region, the second semiconductor region including silicon germanium, edge portions of the second semiconductor region having a first germanium concentration, a center portion of the second semiconductor region having a second germanium concentration less than the first germanium concentration; a gate stack on the second semiconductor region; and source and drain regions in the second semiconductor region, the source and drain regions being adjacent the gate stack.

Abstract: A package structure including IPD and method of forming the same are provided. The package structure includes a die, an encapsulant laterally encapsulating the die, a first RDL structure disposed on the encapsulant and the die, an IPD disposed on the first RDL structure and an underfill layer. The IPD includes a substrate, a first connector on a first side of the substrate and electrically connected to the first RDL structure, a guard structure on a second side of the substrate opposite to the first side and laterally surrounding a connector region, and a second connector disposed within the connector region and electrically connected to a conductive via embedded in the substrate. The underfill layer is disposed to at least fill a space between the first side of the IPD and the first RDL structure. The underfill layer is separated from the connector region by the guard structure.

Abstract: A head-mounted display device includes a main body, a first sensor and a second sensor. The first sensor is disposed on a first setting area of the main body. The second sensor is disposed on a second setting area of the main body. The first setting area and the second setting area respectively have a first central point and a second central point, where the first central point and the second central point are disposed on a horizontal axis. There is a first angle between a connection line of the first central point and the first sensor with the horizontal axis, and there is a second angle between a connection line of the second central point and the second sensor with the horizontal axis, where the first angle is different from the second angle.

Abstract: A heat dissipation device is provided and includes: a first vapor chamber filled with a first working fluid therein and used for contacting at least one heat source; at least one heat transfer structure disposed on a side of the first vapor chamber; and a second vapor chamber filled with a second working fluid therein and connected to the first vapor chamber via the heat transfer structure, where the first working fluid absorbs heat of the heat source and then vaporizes, and the vaporized first working fluid transfers the heat to the second working fluid via the heat transfer structure.

Abstract: The present application discloses a method for fabricating a semiconductor device. The method includes: providing a photomask comprising an opaque layer on a mask substrate and surrounding a translucent layer on the mask substrate; providing a device stack comprising a first dielectric layer on a substrate, a first etch stop layer on the first dielectric layer, and a second dielectric layer on the first etch stop layer; forming a pre-process mask layer on the device stack; patterning the pre-process mask layer using the photomask to form a patterned mask layer comprising a mask region corresponding to the opaque layer, a trench region corresponding to the translucent layer, and a via hole corresponding to the mask opening of via feature. The method also includes performing a damascene etching process to form a via opening in the first dielectric layer and a trench opening in the second dielectric layer.

Abstract: A light-emitting device is disclosed. The light-emitting device includes a light-emitting element, a driving circuit, and a compensation unit. The driving circuit is coupled to the light-emitting element, and is configured to receive a first data signal, drive the light-emitting element, and output a sensing signal. The compensation unit is coupled to the driving circuit, and is configured to receive the sensing signal and compensate the first data signal. The compensation unit includes a first comparator circuit and a second comparator circuit. The first comparator circuit includes a first addition terminal, a first subtraction terminal, and a first output terminal. The second comparator circuit includes a second addition terminal and a second subtraction terminal. The first subtraction terminal receives the sensing signal. The first output terminal is coupled to the second addition terminal.

Abstract: A method and apparatus of prediction for video coding are disclosed. According to one method, a luma Intra prediction mode is determined for a corresponding luma block collocated with the current chroma block, where a predefined mode is assigned to the luma Intra prediction mode when the corresponding luma block collocated with the current chroma block satisfies one or more conditions. A chroma Intra prediction mode is determined for the current chroma block according to the luma Intra prediction mode. The current chroma block is then encoded or decoded according to the chroma Intra prediction mode. According to another method, a predefined mode is assigned to Intra prediction mode for the current block when the current block satisfies one or more conditions. The current block is then encoded or decoded according to the Intra prediction mode.

Abstract: In a method of manufacturing a semiconductor device, a cell structure is formed. The cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack disposed on the bottom electrode and a hard mask layer disposed on the MTJ stack. A first insulating cover layer is formed over sidewall of the MTJ stack. A second insulating cover layer is formed over the first insulating cover layer and the hard mask layer. A first interlayer dielectric (ILD) layer is formed. The hard mask layer is exposed by etching the first ILD layer and the second insulating cover layer. A second ILD layer is formed. A contact opening is formed in the second ILD layer by patterning the second ILD layer and removing the hard mask layer. A conductive layer is formed in the contact opening so that the conductive layer contacts the MTJ stack.

Abstract: Methods, apparatuses, and non-transitory computer-readable storage mediums are provided for video coding. In one method, a decoder derives a reference picture for a current coding block; the decoder derives a predictor sample based on a motion vector associated with the reference picture using a motion compensation process from the reference picture; the decoder determines whether the predictor sample is located outside the reference picture by a certain margin; and the decoder determines the predictor sample is out-of-boundary (OOB) in response to determining the predictor sample is located outside the reference picture by a certain margin.

Abstract: The present disclosure relates to a method of distinguishably detecting two biomarkers with cross-reactivity in a biological sample. The method comprises providing two sensor units specific to the two biomarkers, respectively; obtaining binding affinities of a series of known concentrations of the two biomarkers to the sensor units, respectively; contacting the biological sample with the two sensor units to produce two signals; and calculating the concentrations of the two biomarkers in the biological sample with the two signals and the binding affinities.

Abstract: Provided are a display panel and a display device. An isolation dam is provided in a peripheral area of the display panel. The display panel includes: a display functional layer comprising a plurality of display signal traces; and a touch-control functional layer comprising a plurality of touch-control signal traces. On the binding side, there are a first boundary and a second boundary, and a first trace area located between the first boundary and the second boundary, the first boundary is closer to the display area than the second boundary. In the first trace area, the touch-control signal trace is arranged along a first direction and are led out from the binding circuit and connected to the touch-control pattern via the isolation dam and the first trace area in sequence, the display signal trace is arranged along a second direction and intersects with the touch signal trace.