Patents by Inventor Wei Chin Tsai

Wei Chin Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190206982
    Abstract: A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.
    Type: Application
    Filed: March 11, 2019
    Publication date: July 4, 2019
    Inventors: Tzu-Chin Wu, Wei-Hsin Liu, Yi-Wei Chen, Chia-Lung Chang, Jui-Min Lee, Po-Chun Chen, Li-Wei Feng, Ying-Chiao Wang, Wen-Chieh Lu, Chien-Ting Ho, Tsung-Ying Tsai, Kai-Ping Chen
  • Patent number: 10303157
    Abstract: An additive manufacturing method for a 3D object is provided and includes (a) providing a 3D digital model of the 3D object; (b) dividing the 3D digital model into repeat arrangement of at least one type of polyhedral 3D units and an X-Y plane is an acute angle or an obtuse angle; (c) cutting the 3D digital model along a Z-axis into a plurality of 2D slices; (d) defining a scanning path covering one of the 2D slices; (e) providing an energy beam to a material on a working plane along the scanning path to form a construction layer corresponding to the one of the 2D slices; and (f) repeating the steps (d) and (e) to build up the 3D object by adding a plurality of construction layers in sequence.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: May 28, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Chin Huang, Ching-Chih Lin, Tsung-Wen Tsai, Kuang-Po Chang, Chih-Hsien Wu, An-Li Chen
  • Patent number: 10304835
    Abstract: In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.
    Type: Grant
    Filed: August 15, 2018
    Date of Patent: May 28, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yen Tsai, Ming-Chi Huang, Zoe Chen, Wei-Chin Lee, Cheng-Lung Hung, Da-Yuan Lee, Weng Chang, Ching-Hwanq Su
  • Patent number: 10268598
    Abstract: A counter of a primary memory module provides a count indicative of the number of times the primary memory module has ever been read/written by a processor. With the count, an operating mode of the primary memory module is evaluated to optimize memory allocation performed by the data processing system, adjust the operating mode of the primary memory module, and send a warning message to a user, for example.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: April 23, 2019
    Assignee: International Business Machines Corporation
    Inventors: Chang Li Ping, Alpus P. Chen, Chun-Wei Chen, Elysee Hsieh, Kelvin Shieh, Wei-Chin Tsai
  • Patent number: 10152911
    Abstract: A power supply circuit includes a comparison circuit, a preset value setting circuit, a reset detecting circuit and a reset signal generating circuit. The comparison circuit compares a first and second voltage to output a comparing result. The first and second voltages correspond to a first and second preset value, respectively. When the comparison result shows that the second voltage is greater than the first voltage, the preset value setting circuit outputs the second preset value; otherwise it outputs a third preset value, which is greater than the first preset value. The reset detecting circuit determines whether the operation voltage of the power supply circuit drops to the preset value outputted by the preset value setting circuit, and outputs a control signal accordingly. The reset signal generating circuit determines whether to output a reset signal for resetting gate lines in a display panel based on the control signal.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: December 11, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Wei-Chin Tsai, Chun-Kuei Wen
  • Publication number: 20170162106
    Abstract: A power supply circuit includes a comparison circuit, a preset value setting circuit, a reset detecting circuit and a reset signal generating circuit. The comparison circuit compares a first and second voltage to output a comparing result. The first and second voltages correspond to a first and second preset value, respectively. When the comparison result shows that the second voltage is greater than the first voltage, the preset value setting circuit outputs the second preset value; otherwise it outputs a third preset value, which is greater than the first preset value. The reset detecting circuit determines whether the operation voltage of the power supply circuit drops to the preset value outputted by the preset value setting circuit, and outputs a control signal accordingly. The reset signal generating circuit determines whether to output a reset signal for resetting gate lines in a display panel based on the control signal.
    Type: Application
    Filed: November 15, 2016
    Publication date: June 8, 2017
    Inventors: Wei-Chin TSAI, Chun-Kuei WEN
  • Patent number: 9501427
    Abstract: Provided is a primary memory module including a counter for providing a count indicative of the numbers of times the primary memory module has ever been read/written by a processor. With the count, an operating situation of the primary memory module is evaluated so as to optimize memory allocation performed by the operation system, adjust the operating mode of the primary memory module, and send a warning message to a user, for example.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: November 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Chang Li Ping, Alpus P. Chen, Chun-Wei Chen, Elysee Hsieh, Kelvin Shieh, Wei-Chin Tsai
  • Publication number: 20140304557
    Abstract: A counter of a primary memory module provides a count indicative of the number of times the primary memory module has ever been read/written by a processor. With the count, an operating mode of the primary memory module is evaluated to optimize memory allocation performed by the data processing system, adjust the operating mode of the primary memory module, and send a warning message to a user, for example.
    Type: Application
    Filed: June 23, 2014
    Publication date: October 9, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: CHANG LI PING, ALPUS P. CHEN, CHUN-WEI CHEN, ELYSEE HSIEH, KELVIN SHIEH, WEI-CHIN TSAI
  • Publication number: 20140297975
    Abstract: Provided is a primary memory module including a counter for providing a count indicative of the numbers of times the primary memory module has ever been read/written by a processor. With the count, an operating situation of the primary memory module is evaluated so as to optimize memory allocation performed by the operation system, adjust the operating mode of the primary memory module, and send a warning message to a user, for example.
    Type: Application
    Filed: February 27, 2014
    Publication date: October 2, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: CHANG LI PING, ALPUS P. CHEN, CHUN-WEI CHEN, ELYSEE HSIEH, KELVIN SHIEH, WEI-CHIN TSAI
  • Publication number: 20110055409
    Abstract: A method for network connection is provided. The method uses an identification tag during a network connection process. The method not only makes network connection more easily and convenient, but also gives consideration to security and compatibility.
    Type: Application
    Filed: December 22, 2009
    Publication date: March 3, 2011
    Applicant: Arcadyan Technology Corp.
    Inventor: Wei-Chin Tsai
  • Patent number: 7685339
    Abstract: A remote control system and a method thereof are provided. The remote control system includes a first host, an adapter, and a peripheral device. The first host converts a first serial signal into a first network packet, and then outputs the first network packet through a network. The adapter is connected to the network to receive the first network packet, and then converts the first network packet into a second serial signal complying with a universal serial bus (USB) format. The peripheral device is coupled to the adapter through the USB, and receives the second serial signal, so that the user can control the peripheral device at a remote site through the network.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: March 23, 2010
    Assignee: Arcadyan Technology Corporation
    Inventors: Wei-Chin Tsai, Yun-Fuh Yeh, Hais-Heng Liu, Jun Zheng, Wen-Fang Yan
  • Publication number: 20080307083
    Abstract: A method of managing a gateway by a specific domain name is provided. The method includes firstly setting a DNS to connect to the internet. Next, a specific domain name for the gateway is defined. Then, the specific domain name is stored in the DNS for connecting the gateway according to the specific domain name. The present method maps the specific domain name to an IP address of the gateway, such that a user can manage the gateway by using the specific domain name instead of memorizing the IP address of the gateway, which is more convenient.
    Type: Application
    Filed: November 9, 2007
    Publication date: December 11, 2008
    Applicant: ARCADYAN TECHNOLOGY CORPORATION
    Inventors: Wei-Chin Tsai, Yun-Fuh Yeh
  • Publication number: 20080282011
    Abstract: A remote control system and a method thereof are provided. The remote control system includes a first host, an adapter, and a peripheral device. The first host converts a first serial signal into a first network packet, and then outputs the first network packet through a network. The adapter is connected to the network to receive the first network packet, and then converts the first network packet into a second serial signal complying with a universal serial bus (USB) format. The peripheral device is coupled to the adapter through the USB, and receives the second serial signal, so that the user can control the peripheral device at a remote site through the network.
    Type: Application
    Filed: August 29, 2007
    Publication date: November 13, 2008
    Applicant: ARCADYAN TECHNOLOGY CORPORATION
    Inventors: Wei-Chin Tsai, Yun-Fuh Yeh, Hais-Heng Liu, Jun Zheng, Wen-Fang Yan
  • Patent number: 7394147
    Abstract: A semiconductor package includes a substrate, a first chip, a nonconductive adhesive, a second chip and a plurality of supporting balls. The first chip has an upper surface and a lower surface opposite to the upper surface, and the lower surface is mounted on the substrate. The nonconductive adhesive is disposed on the upper surface of the first chip. The second chip has an upper surface and a lower surface opposite to the upper surface, wherein the lower surface is mounted on the upper surface of the first chip by means of the nonconductive adhesive, and the adherent area between the nonconductive adhesive and the second chip is larger than 90% of the area of the lower surface of the second chip. The supporting balls are disposed in the nonconductive adhesive for supporting the second chip.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: July 1, 2008
    Assignee: Orient Semiconductor Electronics, Limited
    Inventors: Kuo Yang Sun, Chia Ming Yang, Hung Yuan Lu, Wei Chin Tsai, Yi Cheng Lin
  • Publication number: 20020072912
    Abstract: The invention relates to a system comprising a speech processor for controlling an apparatus (101) with speech commands. The system according to the invention includes a remote control (102) having a microphone (104) for the input speech commands. The system also includes a further microphone (107) for enabling other users of the system to issue speech commands too. The system may have input designation means (105) for user operably designating said microphone (104) and/or said further microphone (170) as a signal source to the speech processor.
    Type: Application
    Filed: July 24, 2001
    Publication date: June 13, 2002
    Inventors: Chih-Chuan Yen, Ming Yuan Leu, Wei Chin Tsai, Lin-Lin Chen, Jeng-Weei Lin, Wei-Lun Huang, Shuo-Shiou Hsu