Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

Abstract: A power factor correction converter includes a power stage circuit, a current sensing circuit and a zero current prediction circuit. The power stage circuit converts a rectified power to an output power. The power stage circuit operates in a boundary conduction mode to correct a power factor of the rectified power. The current sensing circuit senses an inductor current to generate a sensing signal. The zero current prediction circuit controls at least one switch by: generating a second period according to a first period, wherein the first period is between when the sensing signal passes a first threshold and when the sensing signal passes a second threshold; and switching a state of the at least one switch at an end time point of the second period, wherein the end time point corresponds to a zero current time point at which the inductor current reaches zero.

Abstract: A power factor correction converter includes a rectifier, a power factor correction controller, a power stage circuit, and a feedback circuit, wherein the power factor correction converter converts an AC voltage into an output voltage. The power factor correction controller includes an analog-to-digital converter, a digital peak-hold circuit, a reference voltage generator, an error amplifier, and a pulse-width modulation circuit, wherein the power factor correction controller generates a driving signal according to a rectification signal and a feedback signal. The digital peak-hold circuit includes a delay circuit, a digital rising detector, a tracking register, a digital falling detector, and a holding register, wherein the digital peak-hold circuit generates a peak signal according to a digital input signal.

Abstract: Techniques described herein enable respective (different) types of metal silicide layers to be formed for p-type source/drain regions and n-type source/drain regions in a selective manner. For example, a p-type metal silicide layer may be selectively formed over a p-type source/drain region (e.g., such that the p-type metal silicide layer is not formed over the n-type source/drain region) and an n-type metal silicide layer may be formed over the n-type source/drain region (which may be selective or non-selective). This provides a low Schottky barrier height between the p-type metal silicide layer and the p-type source/drain region, as well as a low Schottky barrier height between the n-type metal silicide layer and the n-type source/drain region. This reduces the contact resistance for both p-type source/drain regions and n-type source/drain regions.

Abstract: A carrier substrate is provided and has a first circuit structure and a second circuit structure on opposing sides of the carrier substrate, where on one routing region, a difference between a routing ratio of a first circuit layer of the first circuit structure and a routing ratio of a second circuit layer of the second circuit structure is within 10%. Therefore, the difference between the routing ratios of the two opposing outermost circuit layers of the carrier substrate in specific target regions can be reduced, so as to avoid a warpage of the carrier substrate due to a great difference in metal distribution areas.

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

Abstract: An antenna module includes a transceiver chip, a transmitting array antenna, a receiving array antenna, two bandpass filters, and two capacitors. The transmitting array antenna and the receiving array antenna are symmetrically disposed at the two opposite sides of the transceiver chip. One of the bandpass filters is disposed between the transceiver chip and the transmitting array antenna and connected to the transceiver chip and the transmitting array antenna. The other bandpass filter is disposed between the transceiver chip and the receiving array antenna and connected to the transceiver chip and the receiving array antenna. One of the capacitors is disposed between the transmitting array antenna and the corresponding bandpass filter and connected to the transmitting array antenna and the corresponding bandpass filter. The other capacitor is disposed between the receiving array antenna and the corresponding bandpass filter and connected to the receiving array antenna and the corresponding bandpass filter.

Abstract: The present invention provides a resonant switched capacitor voltage converter (RSCC), which is coupled to and operates synchronously with another RSCC. The RSCC includes: plural switches, a resonant inductor, a resonant capacitor, and a control circuit. The control circuit controls the switches, so that the resonant capacitor and the resonant inductor are connected in series to each other, to perform resonant operation in a switching period, thus converting an input voltage to an output voltage. The control circuit generates a zero current signal and a first synchronization signal when a resonant inductor current flowing through the resonant inductor is zero. The control circuit turns off at least one corresponding switch according to the zero current signal. The control circuit turns on at least one corresponding switch according to the zero-current signal and a second synchronization signal, so that the RSCC operates in synchronization with at least another RSCC.

Abstract: A conversion control circuit controls plural stackable sub-converters which are coupled in parallel to generate an output power to a load, the conversion control circuit includes: a current sharing terminal, wherein a current sharing signal is configured to be connected to the current sharing terminals, in parallel, of the plurality of the conversion control circuits; and a current sharing circuit, configured to generate or receive the current sharing signal which is generated according to an output current of the output power; wherein the conversion control circuit adjusts the power stage circuit according to the current sharing signal for current sharing among the plural stackable sub-converters.

Abstract: A boost power factor correction circuit includes: a switch and an inductor coupled to each other; a current sensing device generating a current sensing signal according to a current flowing through the switch; a temperature sensing device coupled to the inductor to generate a temperature sensing signal; and a conversion control circuit operating the switch. The conversion control circuit is an integrated circuit and includes: a shared pin coupled to the temperature sensing device and the current sensing device; and a current sensing circuit and a temperature sensing circuit which sense a multipurpose sensing signal through the shared pin. The multipurpose sensing signal is related to the current sensing signal when the switch is ON and related to the temperature sensing signal when the switch is OFF. The temperature sensing signal is related to an input voltage, an output voltage and an electrical parameter of the temperature sensing device.

Abstract: A battery module for use in a battery system is operable in a bottom mode, a top mode or a middle mode during an enabled state. The battery module includes a battery unit and a battery control circuit. The battery unit which includes at least one battery generates a battery unit voltage between a positive terminal and a negative terminal of the battery unit. The battery control circuit is powered by the battery unit voltage and is configured to control the battery unit. The battery control circuit includes an enable terminal, an upstream input terminal, an upstream output terminal, a downstream input terminal, and a downstream output terminal. When the enable terminal is at an operation enabling level, or when the upstream input terminal is at an upstream enabling level, the battery module enters the enabled state.

Abstract: A control circuit for controlling a power supply circuit to provide power to a system device which includes a communication circuit includes: a pulse width modulation (PWM) controller configured to switch a transformer of the power supply circuit to generate a first output voltage; and a switched capacitor converter configured to generate a second output voltage according to the first output voltage. The second output voltage provides power to the communication circuit, wherein the communication circuit generates a power saving signal to control the PWM controller and the switched capacitor converter. When the power saving signal is enabled, the first output voltage is decreased and a duty ratio of the switched capacitor converter is increased.

Abstract: A brushless DC electric (BLDC) motor driver circuit includes: a power stage circuit configured to operably drive a brushless DC electric (BLDC) motor according to a pulse width modulation (PWM) signal; and an abnormality diagnosis circuit, wherein when a first parameter is under control, the abnormality diagnosis circuit is configured to operably determine a rotation abnormality condition of the BLDC motor according to a second parameter; wherein the first parameter and the second parameter are correlated with the rotation of the BLDC motor.

Abstract: A switched capacitor voltage converter circuit for converting a first voltage to a second voltage includes: an output capacitor; a switched capacitor converter; and a control circuit. The switched capacitor converter includes: a switch circuit including fourth switches; an inductor coupled between the switch circuit and the output capacitor; and a flying capacitor coupled to the switch circuit, wherein the flying capacitor and the output capacitor constitute a voltage divider. The control circuit generates a PWM signal according to the second voltage and generates switch signals according to the PWM signal to control the switch circuit, so as to convert the first voltage to the second voltage. The control circuit decides whether the switched capacitor converter operates in a boundary conduction mode, a discontinuous conduction mode or a continuous conduction mode according to an output current or an output current related signal.

Abstract: A power converter includes first to fourth switches, a flying capacitor, an inductor, an output capacitor and a control circuit. The first to fourth switches are sequentially coupled in cascode. The first switch receives an input voltage, and the fourth switch is further coupled to a ground terminal. The flying capacitor is coupled across the second switch and the third switch, the inductor is coupled to the second switch, the third switch and the output capacitor. The output capacitor is used to output an output voltage. In a non-regulated mode, the control circuit switches the first to fourth switches according to a resonant frequency. In a regulated mode, the control circuit switches the first to fourth switches according to a regulated frequency exceeding the resonant frequency. When the flying capacitor is coupled to the inductor, the flying capacitor and the inductor can form a resonant circuit having the resonant frequency.

Abstract: A power converter includes first to fourth switches, a flying capacitor, an inductor, an output capacitor and a control circuit. The first to fourth switches are sequentially coupled in cascode. The first switch is used to receive an input voltage. The flying capacitor is coupled across the second switch and the third switch, the inductor is coupled to the second switch, the third switch and the output capacitor. The output capacitor is used to output an output voltage. When the input voltage is less than an input voltage threshold, the control circuit is used to switch the first to fourth switches according to a resonant frequency. When the input voltage exceeds the input voltage threshold, the control circuit switch is used to the first to fourth switches according to a regulated frequency exceeding the resonant frequency.

Abstract: A power supply system includes a power factor correction converter circuit and an isolated power converter circuit, wherein the power factor correction converter circuit corrects the power factor of a rectified power to generate a first output power, and the isolated power converter circuit converts the first output power to generate a second output power. The isolated power converter circuit includes a transformer, and the transformer includes a primary winding, a secondary winding, and an auxiliary winding. The auxiliary winding generates an auxiliary voltage which is related to the second output power. When the auxiliary voltage is lower than a disabled threshold, indicating that the voltage of the second output power is lower than a threshold, the power factor correction converter circuit provides a bypassing connection from the rectified power to the first output power and stops correcting the power factor of the rectified power.

Abstract: A switched capacitor voltage converter circuit for converting a first voltage to a second voltage, includes: a switched capacitor converter and a control circuit. The switched capacitor converter includes at least two capacitors, plural switches and at least one inductor. In a mode switching period wherein the switched capacitor converter switches from a present conversion mode to a next conversion mode, at least two forward switches of the plural switches operate in a unidirectional conduction mode. Each of the forward switches provides a current channel that unidirectionally flows toward the second voltage in the unidirectional conduction mode. The switched capacitor voltage converter circuit is also operable to convert the second voltage to the first voltage.

Abstract: A power factor correction converter includes a rectifier, a power factor correction controller, a power stage circuit, and a feedback circuit, wherein the power factor correction converter converts an AC voltage into an output voltage. The power factor correction controller includes an analog-to-digital converter, a digital peak-hold circuit, a reference voltage generator, an error amplifier, and a pulse-width modulation circuit, wherein the power factor correction controller generates a driving signal according to a rectification signal and a feedback signal. The digital peak-hold circuit includes a delay circuit, a digital rising detector, a tracking register, a digital falling detector, and a holding register, wherein the digital peak-hold circuit generates a peak signal according to a digital input signal.

Abstract: A power factor correction converter includes a power stage circuit, a current sensing circuit and a zero current prediction circuit. The power stage circuit converts a rectified power to an output power. The power stage circuit operates in a boundary conduction mode to correct a power factor of the rectified power. The current sensing circuit senses an inductor current to generate a sensing signal. The zero current prediction circuit controls at least one switch by: generating a second period according to a first period, wherein the first period is between when the sensing signal passes a first threshold and when the sensing signal passes a second threshold; and switching a state of the at least one switch at an end time point of the second period, wherein the end time point corresponds to a zero current time point at which the inductor current reaches zero.