Abstract: A semiconductor chip including a semiconductor substrate and an interconnect structure is provided. The semiconductor substrate includes semiconductor devices. The interconnect structure is disposed on the semiconductor substrate and electrically connected to the semiconductor devices. The semiconductor substrate or the interconnect structure includes at least one conductor, which includes a first conductive part and a second conductive part connected to the first conductive part. The first conductive part includes randomly oriented metal, and the second conductive part includes oriented metal. A bonding structure including the above-mentioned semiconductor chip and a fabricating method for fabricating the above-mentioned semiconductor chip are also provided.

Abstract: A video system includes a decoder and a scaler. The decoder tracks a video signal, generates a synchronization signal and a frequency offset signal, decodes the video signal, and outputs a decoded signal in accordance with the synchronization signal. The scaler generates a frequency control signal in accordance with the frequency drift signal, generates an output clock signal in accordance with the frequency control signal, generates a scaled signal in accordance with the decoded signal, and outputs a display signal in accordance with the scaled signal and the output clock signal.

Abstract: A video system includes a decoder and a scaler. The decoder tracks a video signal, generates a synchronization signal and a frequency offset signal, decodes the video signal, and outputs a decoded signal in accordance with the synchronization signal. The scaler generates a frequency control signal in accordance with the frequency drift signal, generates an output clock signal in accordance with the frequency control signal, generates a scaled signal in accordance with the decoded signal, and outputs a display signal in accordance with the scaled signal and the output clock signal.

Abstract: An image signal processing system includes a buffer memory for storing a re-sampled digital data and a memory controller for receiving an used memory depth value and controlling the read speed of the buffer memory for the re-sampled digital data according to the used memory depth value, thereby solving the overflow or underflow problems of the memory.