Patents by Inventor Wei-Tsung Chen
Wei-Tsung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230005963Abstract: A driving circuit film configured to be bond at a periphery region of a display panel. The driving circuit film includes a flexible substrate, a gate driving circuit and a source driver. The gate driving circuit is disposed on the flexible substrate, and the gate driving circuit includes a Thin-Film Transistor. The source driver is disposed on the flexible substrate.Type: ApplicationFiled: July 1, 2022Publication date: January 5, 2023Inventors: Yung-Sheng CHANG, Wei-Tsung CHEN, Yu-Lin WANG
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Publication number: 20220406109Abstract: A distance determination method has: detecting a first received signal strength indicator (RSSI) of a first electronic device by a second electronic device; detecting a second RSSI of the second electronic device by the first electronic device; obtaining the first RSSI from the second electronic device by the first electronic device; and calculating a motion direction and a distance of the second electronic device relative to the first electronic device according to the first RSSI and the second RSSI by the first electronic device.Type: ApplicationFiled: June 2, 2022Publication date: December 22, 2022Inventors: Liang-Yi Hsu, I-Sheng Chen, Yong-Sheng Chen, Wei-Tsung Huang
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Publication number: 20220381827Abstract: A keyboard with wire aging self-adaption, a self-adaption method for keyboard, an electronic computing device readable medium with a stored program, and an electronic computing device program product are provided. In the keyboard, a processor feeds a scanning signal to each scanning line in turn during a scanning round. In response to the conduction state of one of switching elements, the processor detects a return signal on the corresponding return line and selects one or more scanning lines as a testing line. During a first duration in which the testing line maintains the scanning signal, according to the time difference between the starting points of the first duration and the return signal and the response time parameter corresponding to the testing line that is stored in the memory, the processor determines whether to update the response time parameter corresponding to the testing line that is stored in the memory.Type: ApplicationFiled: October 15, 2021Publication date: December 1, 2022Inventors: Wei-Tse HUNG, Chien-Tsung CHEN
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Patent number: 11512246Abstract: A luminescent material includes a particle of an irregular shape. The particle of an irregular shape includes a core of an irregular shape and quantum dots. The quantum dots distribute on the core.Type: GrantFiled: November 8, 2018Date of Patent: November 29, 2022Assignee: CHIMEI CORPORATIONInventors: Yuan-Ren Juang, Szu-Chun Yu, Keng-Chu Lin, Wei-Ta Chen, Yao-Tsung Chuang, Jen-Shrong Uen
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Patent number: 11507067Abstract: A method is disclosed that includes the operations below: determining, by a processing unit, that arrival times of a lot arrived at N process stages are less than processing times of the lot predetermined to be processed at the N process stages, N being a positive integer; comparing, by the processing unit, idle times of multiple tools in the N process stages; and processing the lot with a first tool of the tools at each one of the N process stages, wherein the first tool of the tools has a shortest idle time.Type: GrantFiled: July 2, 2020Date of Patent: November 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ren-Chyi You, An-Wei Peng, Chang-Zong Liu, Yuang-Tsung Chen
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Publication number: 20220359164Abstract: A cantilever for gas flow direction control configured to support an electrode housing bowl in an associated etch process chamber. The cantilever may have a cross-section that is circular, elliptical, or airfoil shaped. The shape of the cantilever induces the flow of gas and etch products within the chamber around the cantilever, reducing turbulence around the edge of a wafer.Type: ApplicationFiled: August 18, 2021Publication date: November 10, 2022Inventors: Chien-Liang Chen, Chien-Yu Wang, Wei-Da Chen, Yu-Ning Cheng, Shih-tsung Chen, Yung-Yao Lee
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Publication number: 20220344378Abstract: An electronic device includes a substrate, a first wiring layer, an oxide insulating layer and a nitride insulating layer. The first wiring layer is disposed on the substrate and includes an outer metal layer. The outer metal layer contains at least 97 wt % molybdenum. The oxide insulating layer is disposed on the first wiring layer and touches the outer metal layer. The nitride insulating layer is disposed on the oxide insulating layer, where the thickness difference between the thickness of the oxide insulating layer and the thickness of the nitride insulating layer is greater than or equal to 250 nm.Type: ApplicationFiled: April 1, 2022Publication date: October 27, 2022Inventors: Yu-Lin WANG, Wei-Tsung CHEN
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Publication number: 20220344373Abstract: An electronic device includes a substrate, a wiring structure, an oxide insulating layer and a nitride insulating layer. The wiring structure is disposed on the substrate and includes an outer metal layer and an inner metal layer. The outer metal layer contains no molybdenum. The inner metal layer disposed between the outer metal layer and the substrate contains molybdenum. The oxide insulating layer is disposed on the wiring structure and directly touches the outer metal layer. The nitride insulating layer is disposed on the oxide insulating layer, where the oxide insulating layer is positioned between the nitride insulating layer and the outer metal layer.Type: ApplicationFiled: April 1, 2022Publication date: October 27, 2022Inventors: Yu-Lin WANG, Wei-Tsung CHEN
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Publication number: 20220310576Abstract: The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a substrate, a first electronic component, an interlayer, a third electronic component and an encapsulant. The first electronic component is disposed on the substrate. The first electronic component has an upper surface and a lateral surface and a first edge between the upper surface and the lateral surface. The interlayer is on the upper surface of the first electronic component. The third electronic component is attached to the upper surface of the first electronic component via the interlayer. The encapsulant encapsulates the first electronic component and the interlayer. The interlayer does not contact the lateral surface of the first electronic component.Type: ApplicationFiled: March 26, 2021Publication date: September 29, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei Tsung CHEN, Li-Hua TAI, Paofa WANG
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Patent number: 11416979Abstract: A defect displaying method is provided in the disclosure. The method comprises acquiring defect group information from an image of a wafer, wherein the defect group information includes a set of correlations between a plurality of defects identified from the image and one or more corresponding assigned defect types and displaying at least some of the plurality of defects according to their corresponding assigned defect types.Type: GrantFiled: January 18, 2018Date of Patent: August 16, 2022Assignee: ASML Netherlands B.V.Inventors: Wei Fang, Cho Huak Teh, Ju Hao Chien, Yi-Ying Wang, Shih-Tsung Chen, Jian-Min Liao, Chuan Li, Zhaohui Guo, Pang-Hsuan Huang, Shao-Wei Lai, Shih-Tsung Hsu
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Patent number: 11391685Abstract: A sensitive device includes a plurality of first conductive nanostructures, a conductive layer and at least one electrode. The conductive layer covers the first conductive nanostructures. An intrinsic melting point of the conductive layer is higher than that of the first conductive nanostructures. At least one of the conductive layer and the first conductive nanostructures is sensitive to gas. The electrode is electrically connected to at least one of the first conductive nanostructures and the conductive layer.Type: GrantFiled: September 12, 2017Date of Patent: July 19, 2022Assignee: E Ink Holdings Inc.Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Po-Yi Chang, Hung-Chuan Liu, Yi-Ting Chou, Wei-Tsung Chen
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Publication number: 20220216351Abstract: A method for manufacturing a sensing device is provided. The method includes: providing a substrate; forming a sensing unit on the substrate; forming a first light-shielding layer on the sensing unit; forming a first anti-reflection layer on the sensing unit; and patterning the first light-shielding layer and the first anti-reflection layer using a single lithography process to form a first pinhole corresponding to the sensing unit.Type: ApplicationFiled: December 8, 2021Publication date: July 7, 2022Inventors: Wei-Lin WAN, Yu-Tsung LIU, Ming-Chih CHEN, Te-Yu LEE
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Publication number: 20220215207Abstract: A training method for video stabilization and an image processing device using the same are proposed. The method includes the following steps. An input video including low dynamic range (LDR) images is received. The LDR images are converted to high dynamic range (HDR) images by using a first neural network. A feature extraction process is performed to obtain features based on the LDR images and the HDR images. A second neural network for video stabilization is trained according to the LDR images and the HDR images based on a loss function by minimizing a loss value of the loss function to generate stabilized HDR images in a time-dependent manner, where the loss value of the loss function depends upon the features. An HDR classifier is constructed according to the LDR images and the HDR images. The stabilized HDR images are classified by using the HDR classifier to generate a reward value, where the loss value of the loss function further depends upon the reward value.Type: ApplicationFiled: March 23, 2022Publication date: July 7, 2022Applicant: Novatek Microelectronics Corp.Inventors: Jen-Huan Hu, Wei-Ting Chen, Yu-Che Hsiao, Shih-Hsiang Lin, Po-Chin Hu, Yu-Tsung Hu, Pei-Yin Chen
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Patent number: 11373060Abstract: A training method for video stabilization and an image processing device using the same are proposed. The method includes the following steps. An input video including low dynamic range (LDR) images is received. The LDR images are converted to high dynamic range (HDR) images by using a first neural network. A second neural network for video stabilization is trained to generate stabilized HDR images in a time-dependent manner.Type: GrantFiled: May 25, 2020Date of Patent: June 28, 2022Assignee: Novatek Microelectronics Corp.Inventors: Jen-Huan Hu, Wei-Ting Chen, Yu-Che Hsiao, Shih-Hsiang Lin, Po-Chin Hu, Yu-Tsung Hu, Pei-Yin Chen
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Patent number: 11244638Abstract: A trace structure of a display panel including a first metal layer and a second metal layer is provided. The first metal layer is configured to transmit a first voltage. The second metal layer is disposed under the first metal layer and configured to transmit a second voltage. The first metal layer and the second metal layer form the trace structure on the display panel, such that the trace structure has a capacitor structure. The trace structure is configured to connect a power input and a panel driver circuit.Type: GrantFiled: March 2, 2021Date of Patent: February 8, 2022Assignee: E Ink Holdings Inc.Inventors: Xue-Hung Tsai, Wei-Tsung Chen, Po-Hsin Lin
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Patent number: 11226400Abstract: A proximity sensor includes a substrate, a light source, a finger electrode, an active layer, and a transparent electrode layer. The substrate has opposite top and bottom surfaces. The light source faces toward the bottom surface of the substrate. The finger electrode is located on the top surface of the substrate, and has finger portions and gaps between every two adjacent finger portions. The active layer covers the finger electrode, and is located in the gaps. The transparent electrode layer is located on the active layer. When the light source emits light, the light through the gaps sequentially passes through the active layer and the transparent electrode layer onto a reflective surface. The light is reflected by the reflective surface to form reflected light, and the reflected light passes through the transparent electrode layer and is received by the active layer.Type: GrantFiled: March 19, 2020Date of Patent: January 18, 2022Assignee: E Ink Holdings Inc.Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Ching-Fu Lin, Chao-Hsuan Chen, Zong-Xuan Li, Wei-Tsung Chen
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Patent number: 11120761Abstract: A driving substrate includes a substrate, at least one active device, a resistor, a first passivation layer and a second passivation layer. The active device including an oxide semiconductor layer and the resistor coupled to the active device are disposed on the substrate. The first passivation layer covers the active device, wherein a portion of the first passivation layer directly contacts to the oxide semiconductor layer such that the oxide semiconductor layer has a first conductivity. The second passivation layer covers the first passivation layer and the resistor, wherein a portion of the second passivation layer directly contacts to the resistor such that the resistor has a second conductivity. The first conductivity is different from the second conductivity.Type: GrantFiled: October 16, 2018Date of Patent: September 14, 2021Assignee: E Ink Holdings Inc.Inventors: Wei-Tsung Chen, Po-Hsin Lin, Xue-Hung Tsai
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Patent number: 11114570Abstract: A memory structure includes a substrate, a gate electrode, a first isolation layer, a thin metal layer, indium gallium zinc oxide (IGZO) particles, a second isolation layer, an IGZO channel layer, and a source/drain electrode. The gate electrode is located on the substrate. The first isolation layer is located on the gate electrode. The thin metal layer is located on the first isolation layer, and has metal particles. The IGZO particles are located on the metal particles. The second isolation layer is located on the IGZO particles. The IGZO channel layer is located on the second isolation layer. The source/drain electrode is located on the IGZO channel layer.Type: GrantFiled: April 12, 2020Date of Patent: September 7, 2021Assignee: E Ink Holdings Inc.Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Ching-Fu Lin, Zong-Xuan Li, Wei-Tsung Chen
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Publication number: 20210272527Abstract: A trace structure of a display panel including a first metal layer and a second metal layer is provided. The first metal layer is configured to transmit a first voltage. The second metal layer is disposed under the first metal layer and configured to transmit a second voltage. The first metal layer and the second metal layer form the trace structure on the display panel, such that the trace structure has a capacitor structure. The trace structure is configured to connect a power input and a panel driver circuit.Type: ApplicationFiled: March 2, 2021Publication date: September 2, 2021Applicant: E Ink Holdings Inc.Inventors: Xue-Hung Tsai, Wei-Tsung Chen, Po-Hsin Lin
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Patent number: 11041822Abstract: A sensing element includes a conductive substrate, a zinc oxide seed layer, a plurality of zinc oxide nanorods, a film with an electrical double layer, and an organic sensing layer. The zinc oxide seed layer is located on the conductive substrate. The zinc oxide nanorods extend from the zinc oxide seed layer. The film with the electrical double layer covers the zinc oxide nanorods. The organic sensing layer is located on the film with the electrical double layer.Type: GrantFiled: August 22, 2018Date of Patent: June 22, 2021Assignee: E Ink Holdings Inc.Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Yu-Nung Mao, Hung-Chuan Liu, Zong-Xuan Li, Wei-Tsung Chen