Patents by Inventor Wei-Tsung Chen

Wei-Tsung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8853691
    Abstract: A transistor and a manufacturing method thereof are provided. The transistor includes a first gate, a second gate disposed on one side of the first gate, a first semiconductor layer, a second semiconductor layer, an oxide layer, a first insulation layer, a second insulation layer, a source, and a drain. The first semiconductor layer is disposed between the first and second gates; the second semiconductor layer is disposed between the first semiconductor layer and the second gate. The oxide layer is disposed between the first semiconductor layer and the second semiconductor layer. The first insulation layer is disposed between the first gate and the first semiconductor layer; the second insulation layer is disposed between the second gate and the second semiconductor layer. The source and the drain are disposed between the first insulation layer and the second insulation layer and respectively disposed on opposite sides of the oxide layer.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 7, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Chih-Hsiang Yang, Ted-Hong Shinn, Wei-Tsung Chen, Hsing-Yi Wu
  • Patent number: 8829514
    Abstract: Disclosed herein is a thin film transistor, which includes a metal oxide semiconductor layer, an insulating layer, a gate electrode, a source electrode and a drain electrode. The metal oxide semiconductor layer includes a channel region having at least one first region and a second region. The first region has an oxygen vacancy concentration greater than an oxygen vacancy concentration of the second region. The second region surrounds the first region. A method for manufacturing the thin film transistor is disclosed as well.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: September 9, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Chun-Hung Liao, Wei-Tsung Chen
  • Publication number: 20140183521
    Abstract: A thin film transistor structure including a substrate, a gate, an oxide semiconductor layer, a gate insulation layer, a source, a drain, a silicon-containing light absorption layer and an insulation layer is provided. The gate insulation layer is disposed between the oxide semiconductor layer and the gate. The oxide semiconductor layer and the gate are stacked in a thickness direction. The source and the drain contact the oxide semiconductor layer. A portion of the oxide semiconductor layer without contacting the source and the drain defines a channel region located between the source and the drain. The oxide semiconductor layer is located between the substrate and the silicon-containing light absorption layer. The silicon-containing light absorption layer has a band gap smaller than 2.5 eV. The insulation layer is disposed between the oxide semiconductor layer and the silicon-containing light absorption layer, and in contact with the silicon-containing light absorption layer.
    Type: Application
    Filed: August 12, 2013
    Publication date: July 3, 2014
    Applicant: E Ink Holdings Inc.
    Inventors: Cheng-Hang Hsu, Tzung-Wei Yu, Wei-Tsung Chen, Ted-Hong Shinn
  • Publication number: 20140138677
    Abstract: A thin film transistor and a fabrication method thereof are provided. A metal patterning layer is formed on the metal oxide semiconductor layer of a thin film transistor to shield the metal oxide semiconductor layer from the water, oxygen and light in the environment.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 22, 2014
    Applicant: E Ink Holdings Inc.
    Inventors: Wei-Tsung CHEN, Ted-Hong SHINN, Chuang-Chuang TSAI, Chih-Hsiang YANG, Chia-Chun YEH, Wen-Chung TANG
  • Publication number: 20140071588
    Abstract: A capacitor structure of capacitive touch panel including a first electrode layer, a first material layer, a second material layer and a second electrode layer is provided. The first material layer is disposed on the first electrode layer, and the material of the first material layer is selected from one of a semiconductor material and an insulating material. The second material layer is disposed on the first material layer, and the material of the second material layer is selected from another one of the semiconductor material and the insulating material. The second electrode layer is disposed on the second material layer.
    Type: Application
    Filed: June 18, 2013
    Publication date: March 13, 2014
    Inventors: Wei-Tsung Chen, Ted-Hong Shinn, Chuang-Chuang Tsai, Wen-Chung Tang, Chih-Hsiang Yang
  • Publication number: 20140048679
    Abstract: A light sensor including a photo transistor is provided. A gate of the photo transistor receives a gate driving signal. The photo transistor senses a light source based on the gate driving signal to generate a light current signal. The photo transistor includes a metal-oxide active layer. The gate driving signal has a first voltage level during a trap period and has a second voltage level during a read period. The first voltage level is higher than the second voltage level. The gate driving signal of the photo transistor introduces a mechanism to rapidly eliminate excess carriers. Accordingly, the photo transistor has a rapid response while maintaining good light responsibility. Furthermore, a method for driving the foregoing photo transistor is also provided.
    Type: Application
    Filed: October 25, 2012
    Publication date: February 20, 2014
    Applicant: E INK HOLDINGS INC.
    Inventors: Wei-Tsung Chen, Ted-Hong Shinn, Chuang-Chuang Tsai, Wen-Chung Tang, Chih-Hsiang Yang
  • Publication number: 20140034944
    Abstract: A thin film transistor (TFT) including a gate, a dielectric layer, a metal-oxide semiconductor channel, a source, and a drain is provided. The gate and the metal-oxide semiconductor channel are overlapped. The gate, the source, and the drain are separated by the dielectric layer. Besides, the source and the drain are respectively located on two opposite sides of the metal-oxide semiconductor channel. The metal-oxide semiconductor channel includes a metal-oxide semiconductor layer and a plurality of nano micro structures disposed in the metal-oxide semiconductor layer and separated from one another. In another aspect, a display panel including the TFT and a method of fabricating the TFT are also provided.
    Type: Application
    Filed: March 15, 2013
    Publication date: February 6, 2014
    Applicant: E INK HOLDINGS INC.
    Inventors: Hsiao-Wen Zan, Chuang-Chuang Tsai, Xue-Hung Tsai, Henry Wang, Wei-Tsung Chen
  • Publication number: 20140008646
    Abstract: A transistor and a manufacturing method thereof are provided. The transistor includes a first gate, a second gate disposed on one side of the first gate, a first semiconductor layer, a second semiconductor layer, an oxide layer, a first insulation layer, a second insulation layer, a source, and a drain. The first semiconductor layer is disposed between the first and second gates; the second semiconductor layer is disposed between the first semiconductor layer and the second gate. The oxide layer is disposed between the first semiconductor layer and the second semiconductor layer. The first insulation layer is disposed between the first gate and the first semiconductor layer; the second insulation layer is disposed between the second gate and the second semiconductor layer. The source and the drain are disposed between the first insulation layer and the second insulation layer and respectively disposed on opposite sides of the oxide layer.
    Type: Application
    Filed: March 14, 2013
    Publication date: January 9, 2014
    Applicant: E INK HOLDINGS INC.
    Inventors: Chih-Hsiang Yang, Ted-Hong Shinn, Wei-Tsung Chen, Hsing-Yi Wu
  • Publication number: 20130320329
    Abstract: A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen contents of the first and the second protection layers are controlled to affect the oxygen vacancy number of the first and the second active layers to satisfy the various electronic requirements of the first and the second transistors.
    Type: Application
    Filed: March 1, 2013
    Publication date: December 5, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Chia-Chun YEH, Xue-Hung TSAI, Cheng-Hang HSU, Wei-Tsung CHEN, Ted-Hong SHINN
  • Publication number: 20130187844
    Abstract: A light sensitive display apparatus and an operating method thereof are disclosed herein. The light sensitive display apparatus includes a plurality of pixels, and the operating method of the light sensitive display apparatus includes the following steps. In a writing state, a first data voltage and a first gate voltage are provided to the pixels, and the pixels illuminated by light rays are switched to or kept in a first display state. In an erasing state, a second data voltage and a second gate voltage are provided to the pixels, and the pixels illuminated by light rays are switched to or kept in a second display state.
    Type: Application
    Filed: September 14, 2012
    Publication date: July 25, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Wei-Tsung CHEN, Ted-Hong SHINN, Wen-Chung TANG, Chih-Hsiang YANG
  • Publication number: 20120112180
    Abstract: The instant disclosure relates to a metal oxide thin film transistor having a threshold voltage modification layer. The thin film transistor includes a gate electrode, a dielectric layer formed on the gate electrode, an active layer formed on the dielectric layer, a source electrode and a drain electrode disposed separately on the active layer, and a threshold voltage modulation layer formed on the active layer in direct contact with the back channel of the transistor. The threshold voltage modulation layer and the active layer have different work functions so that the threshold voltage modulation layer modulates the threshold voltage of devices and improve the performance of the transistor.
    Type: Application
    Filed: December 2, 2010
    Publication date: May 10, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: HSIAO-WEN ZAN, CHUANG-CHUANG TSAI, WEI-TSUNG CHEN, HSIU-WEN HSUEH
  • Publication number: 20120018718
    Abstract: A self-aligned top-gate thin film transistor and a fabrication method thereof. The method includes preparing a substrate having sequentially formed thereon an oxide semiconductor layer, a dielectric layer, and a metallic layer, wherein the oxide semiconductor layer includes first and second connecting regions that are not covered by the dielectric layer and the metallic layer thereon respectively, the first and second connecting regions having a property of a conductor after undergone a heating process or an ultraviolet irradiation; and a source electrode and a drain electrode formed on the substrate and connected to the first and second connecting regions, respectively. Therefore, the contact resistance of the first and second connecting regions can be reduced without the process of ion dopants as required by prior art techniques, thereby simplifying the manufacturing process. Also, the source electrode and the drain electrode can be exactly relocated and further increase performance of the device.
    Type: Application
    Filed: November 26, 2010
    Publication date: January 26, 2012
    Applicant: National Chiao Tung University
    Inventors: Hsiao-Wen Zan, Wei-Tsung Chen, Cheng-Wei Chou, Chuang-Chuang Tsai
  • Publication number: 20120018719
    Abstract: A phototransistor includes a substrate, a gate layer, a dielectric layer, an active layer, a source and a drain, and a light absorption layer. The gate layer is disposed on a top of the substrate, and the dielectric layer is disposed on a top of the gate layer. The active layer has a first bandgap and is disposed on a top of the dielectric layer, and the source and the drain are disposed on a top of the active layer. The light absorption layer has a second bandgap and is capped on the active layer, and the second bandgap is smaller than the first bandgap.
    Type: Application
    Filed: February 15, 2011
    Publication date: January 26, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: HSIAO-WEN ZAN, HSIN-FEI MENG, CHUANG-CHUANG TSAI, WEI-TSUNG CHEN, YU-CHIANG CHAO
  • Publication number: 20020130250
    Abstract: A method for detecting the position of a wafer in the slot of a wafer boat. The method comprises: Providing a first light source and second light source. Using a beam splitter apparatus for separating the light emitted from the first light source into a first light beam and a second light beam. Using a first sensor to receive the first light beam and functions in detecting the existence of the wafer in the slot of the wafer boat. Using a second sensor to receive the second light beam and functions in detecting the number of wafers in the slot of the wafer boat. Using a third sensor to receive the light emitted from the second light source to detect whether there is a protrusion of the wafer from the wafer boat.
    Type: Application
    Filed: March 13, 2001
    Publication date: September 19, 2002
    Inventors: Chih-Ming Chung, Wei-Tsung Chen
  • Patent number: 6106660
    Abstract: An installation for wafer etching that has an additional bias voltage applied to its lower electrode, comprising a central processing unit, a radio frequency generator, a matching box controller, a radio frequency sensor box, a matching box and an etching machine. The central processing unit is connected to the radio frequency generator and the matching box controller for controlling the generation of radio frequency power and the bias voltage provided by the matching box. The radio frequency sensor box receives the radio frequency power and transfers the radio frequency power to the matching box, while a signal is sent to the matching box controller for controlling the bias voltage supplied to the lower electrode. Consequently, the ions can have more kinetic energy resulting in a greater bombarding effect and the formation of polymer on the wafer is limited. Furthermore, the effect of helium loss can be minimized and down time of the etching machine can be greatly reduced.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: August 22, 2000
    Assignee: United Semiconductor Corp.
    Inventor: Wei-Tsung Chen