Abstract: A board structure for a cable passing therethrough includes a board body and a grommet. The board body includes a board hole and a first inner protrusion portion. A minimum diameter of the board hole is a diameter located corresponding to the first inner protrusion portion of the board hole. The grommet is made of an elastic material and disposed in the board hole. The grommet includes a grommet hole and an outer annular wall. The outer annular wall is connected to the first inner protrusion portion. The grommet hole is for the cable passing therethrough and coaxially disposed with the board hole. A diameter of the grommet hole is smaller than the minimum diameter of the board hole.

Abstract: A board structure for a cable passing therethrough includes a board body and a grommet. The board body includes a board hole and a first inner protrusion portion. A minimum diameter of the board hole is a diameter located corresponding to the first inner protrusion portion of the board hole. The grommet is made of an elastic material and disposed in the board hole. The grommet includes a grommet hole and an outer annular wall. The outer annular wall is connected to the first inner protrusion portion. The grommet hole is for the cable passing therethrough and coaxially disposed with the board hole. A diameter of the grommet hole is smaller than the minimum diameter of the board hole.

Abstract: A system for improving dysarthria speech intelligibility and method thereof, are provided. In the system, user only needs to provides a set of paired corpus including a reference corpus and a patient corpus, and a speech disordering module can automatically generate a new corpus completely synchronous with the reference corpus, and the new corpus can be used as a training corpus for training a dysarthria voice conversion model. The present invention does not need to use a conventional corpus alignment technology or a manual manner to perform pre-processing on the training corpus, so that manpower cost and time cost can be reduced, and synchronization of the training corpus can be ensured, thereby improving both training and conversion qualities of the voice conversion model.

Abstract: An electronic device includes a display having an active array and a reference array. The active array includes a pixel and the reference array includes a reference pixel. The electronic device also includes processing circuitry communicatively coupled to the display. The processing circuitry is configured to instruct the active array to drive the pixel based at least in part on a set of degradation ratios and gamma tap points for each brightness setting of the display based at least in part on a reconstructed current-voltage curve.

Abstract: A pixel structure including a substrate, a signal line, a plurality of pixel units and a light blocking pattern layer is provided. The signal line is disposed on the substrate and has opposing first and second sides. Two adjacent pixel units are disposed respectively on the first side and the second side of the signal line. Each pixel units includes an active device, a common electrode, an insulating layer, and a pixel electrode. The insulating layer is located on the common electrode. The pixel electrode is located on the insulating layer and is electrically connected to the active device. The pixel electrode includes an edge strip electrode and a plurality of extension electrodes. The extension electrodes respectively extend from the edge strip electrode toward the signal line. The light blocking pattern layer is located between two adjacent pixel units, and the light blocking pattern layer and the signal line overlap with each other.

Abstract: An electronic structure and a method for fabricating the same are provided. An electronic component and conductive elements are disposed on a carrier. An encapsulating layer encapsulates the electronic component and the conductive elements. The encapsulating layer is formed with recessed portions corresponding in position to the conductive elements. A gap is formed between the conductive elements and the recessed portions.

Abstract: A reference voltage generator includes a detecting voltage provider, a comparator, and a core circuit. The detecting voltage provider provides a detecting voltage with a first voltage level corresponding to a voltage coefficient. The comparator compares the first voltage level of the detecting voltage with a plurality of sampled amplitudes of an input signal to respectively generate a plurality of comparison results. The core circuit is used to: collect a plurality of first comparison results associated with a current received bit of a preset value from the comparison results; take the voltage coefficient as a first boundary voltage coefficient in response to the first comparison results satisfying a first condition; take the voltage coefficient as a second boundary voltage coefficient in response to the first comparison results satisfying a second condition. The reference circuit generates a reference voltage according to the first and second boundary voltage coefficients.

Abstract: A display device is provided to have an emission spectrum. The emission spectrum is performed in a white image of highest grey level and includes a first sub emission spectrum ranging from 380 nm to 478 nm and a second sub emission spectrum ranging from 479 nm to 780 nm, and the first sub emission spectrum has a maximum peak wavelength greater than or equal to 453 nm. An integral value of the first sub emission spectrum multiplied by a blue light hazard weighting function from 380 nm to 478 nm is defined as a first integration, and an integral value of the second sub emission spectrum multiplied by an eye function from 479 nm to 780 nm is defined as a second integration. A ratio of the first integration to the second integration is in a range from 40% to 65%.

Abstract: A mobile electronic device includes a display having an active array and a reference array. The active array includes a pixel and the reference array includes a reference pixel. The mobile electronic device also includes processing circuitry communicatively coupled to the display. The processing circuitry is configured to instruct the active array to drive the pixel based at least in part on a current-voltage relationship of the pixel and a reference current-voltage relationship of the reference pixel.

Abstract: A recording system of brewing pour over coffee which comprises a touch screen, a robotic manipulator and a storage unit. The touch screen displays information, such as coffee drippers, water amounts, etc, thereon and for a user to input a process of brewing pour over coffee thereon. The touch screen allows the user to manage the status of the pour over coffee in real-time. The robotic manipulator equipped with a water injection unit, which moves the water injection unit according to the process of brewing pour over coffee to pour water to a coffee dripper simultaneously to make coffee. The storage unit stores data, such as a position where the water to be poured, a route of the process of brewing pour over coffee, a speed of the pouring motion and the required amount of water to be poured during the process of brewing pour over coffee.

Abstract: A liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer, a plurality of first regions and a plurality of second regions. The first regions and the second regions are formed on the first substrate and the second substrate. In a narrow viewing mode, the luminous flux of the first regions along a first viewing direction is different from that of the first regions along a second viewing direction opposite to the first viewing direction, and the luminous flux of the second regions along the first viewing direction is substantially different from that of the first regions along the first viewing direction.

Abstract: A structure for attaching an ultrasound sensor to a side portion of a vehicle includes a bracket via which the ultrasound sensor is attached to face the ground under the floor of the vehicle and to be inclined at a predetermined angle with respect to the horizontal plane such that water drops adhering to the ultrasound sensor flow downward.

Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

Abstract: A method for sizing a DNA molecule is disclosed, which comprises the following steps of: providing a DNA sizing device, comprising: a cover substrate; a substrate disposed on the cover substrate and comprising a first hole and a second hole; and a first slit-like channel disposed between the cover substrate and the substrate, wherein two ends of the first slit-like channel respectively connects to the first hole and the second hole; loading a sample comprising a DNA molecule to the first slit-like channel through the first hole, wherein the DNA molecule moves in a direction from the first hole to the second hole; detecting and recording an intensity and an area of a distribution of the DNA molecule; and analyzing the intensity and the area to obtain the size of a DNA molecule.

Abstract: A semiconductor device includes a first passivation layer over a substrate. The semiconductor device further includes at least two post passivation interconnect (PPI) lines over the first passivation layer, wherein a top portion of each of the at least two PPI lines has a rounded shape. The semiconductor device further includes a second passivation layer configured to stress the at least two PPI lines. The semiconductor device further includes a polymer material over the second passivation layer and filling a trench between adjacent PPI lines of the at least two PPI lines.

Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

Abstract: A method for forming a FinFET device structure is provided. The method includes forming a first fin structure and a second fin structure over a substrate and forming a liner layer over the first fin structure and the second fin structure. The method also includes forming an isolation layer over the liner layer and removing a portion of the liner layer and a portion of the isolation layer, such that the liner layer includes a first liner layer on an outer sidewall surface of the first fin structure and a second liner layer on an inner sidewall surface of the first fin structure, and a top surface of the second liner layer is higher than a top surface of the first liner layer.

Abstract: The present invention provides a layout pattern of a static random access memory (SRAM), comprising at least one substrate, two SRAM units on the substrate, respectively located in a first region and a second region which is adjacent to the first region. Each of the SRAM units includes a first inverter coupled to a second inverter and configured to form a latching circuit, the first inverter includes a first pull-up transistor (PU1) and a first pull-down transistor (PD1), the second inverter includes a second pull-up transistor (PU2) and a second pull-down transistor (PD2). A dummy layer crossing the first a region and the second region, and between the PD1 in the first region and the PD1 in the second region, and a contact structure on the dummy layer, electrically connected to a voltage source Vss.

Abstract: The present disclosure provides an electronic package and a method for fabricating the same. A protective layer is formed on a carrier of the electronic component. The electronic component and the protective layer are covered by a covering layer. A through hole is formed in the covering layer and extends through the protective layer, such that a portion of a surface of the carrier is exposed to the through hole. A conductive structure is disposed in the through hole and electrically connected with the carrier. Through the formation of the protective layer, the buffering effect of the protective layer can prevent the laser from directly burning through the covering layer and the protective layer to avoid damages to the carrier.

Abstract: A mixed reality viewing system includes a viewer configured to be secured to a steady platform and operable by a user to view a theme through the viewer. The viewer includes a display device, a user interface comprising a zoom control, and at least one sensor comprising at least one camera. The mixed reality viewing system also includes a computer graphics generation system communicatively coupled to the viewer. The computer graphics generation system is configured to generate streaming media of a real world environment based on image data captured via the at least one camera of the viewer, generate augmented reality graphics, virtual reality graphics, or both, superimposed on the streaming media of the real world environment, and transmit the streaming media of the real world environment along with the superimposed augmented reality graphics, virtual reality graphics, or both, to be displayed on the display device of the viewer.