Patents by Inventor Wei-Yueh Sung

Wei-Yueh Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140312496
    Abstract: The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.
    Type: Application
    Filed: April 30, 2014
    Publication date: October 23, 2014
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yen-Yi WU, Wei-Yueh SUNG, Pao-Huei CHANG CHIEN, Chi-Chih CHU, Cheng-Yin LEE, Gwo-Liang WENG
  • Patent number: 7642133
    Abstract: The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: January 5, 2010
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yen-Yi Wu, Wei-Yueh Sung, Pao-Huei Chang Chien, Chi-Chih Chu, Cheng-Yin Lee, Gwo-Liang Weng
  • Publication number: 20080164595
    Abstract: The present invention relates to a stackable semiconductor package and the method for making the same. The stackable semiconductor package comprises a first substrate, a semiconductor device, a plurality of stud bumps, a plurality of first wires, a second substrate, and a molding compound. The semiconductor device is disposed on the first substrate and electrically connected to the first substrate. The stud bumps are above the semiconductor device. The first wires are used for electrically connecting the stud bumps and the first substrate. The stud bumps are in contact with the second substrate. The molding compound encapsulates the first substrate, the semiconductor device, the stud bumps, the first wires, and the second substrate, and thus, the second substrate will not undergo wire bonding, and will not be suspended and shake or sway, as present in a conventional stackable semiconductor package.
    Type: Application
    Filed: January 3, 2008
    Publication date: July 10, 2008
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yen-Yi Wu, Pao-Huei Chang Chien, Wei-Yueh Sung
  • Publication number: 20080073769
    Abstract: The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.
    Type: Application
    Filed: July 26, 2007
    Publication date: March 27, 2008
    Inventors: Yen-Yi Wu, Wei-Yueh Sung, Pao-Huei Chang Chien, Chi-Chih Chu, Cheng-Yin Lee, Gwo-Liang Weng
  • Publication number: 20080076208
    Abstract: The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.
    Type: Application
    Filed: July 26, 2007
    Publication date: March 27, 2008
    Inventors: Yen-Yi Wu, Wei-Yueh Sung, Pao-Huei Chang Chien, Chi-Chih Chu, Cheng-Yin Lee, Gwo-Liang Weng
  • Publication number: 20070029668
    Abstract: The package module comprising a first substrate, a first package, a second package and a molding compound. The first substrate has a first surface. The first package comprises a first chip and a liquid encapsulating compound. The first chip is disposed on the first substrate and electrically connected to the first substrate by a first gold wire. The liquid encapsulating compound encloses a second surface of the first chip and part of the first gold wire. A surface of the liquid encapsulating compound provides a platform. The molding compound encloses at least partial first surface of the first substrate, the first package and the second package.
    Type: Application
    Filed: July 6, 2006
    Publication date: February 8, 2007
    Inventors: Sem-Wei Lin, Wei-Yueh Sung, Wen-Pin Huang