Patents by Inventor Wen-Hung Lo

Wen-Hung Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170045575
    Abstract: One embodiment of the present invention sets forth an integrated circuit that includes multiple input/output (I/O) pad groups. Each I/O pad group includes an on-chip star network, multiple I/O pads, multiple test multiplexers, a digital-to-analog converter (DAC), and a wide-range comparator. Each test multiplexer is configured to couple a different I/O pad to the on-chip star network. The DAC is configured to supply at least one of a source current, a sink current, and a first reference voltage to the on-chip star network. The wide-range comparator is configured to compare a voltage present on a first I/O pad included in the plurality of I/O pads with a second reference voltage. Advantageously, IO leakage and DC parametric testing may be performed on integrated circuits with high I/O pad counts using an ATE system with a significantly lower quantity of ATE test channels relative to prior approaches.
    Type: Application
    Filed: August 11, 2015
    Publication date: February 16, 2017
    Inventors: Ashfaq SHAIKH, Wen-Hung LO, Punit KISHORE, Amit SANGHANI, Krishna RAJAN
  • Patent number: 8891299
    Abstract: A method for performing a programming operation to a first memory bit and a second memory bit of a device is described. The method includes applying a pulse train voltage to a metal gate of the device and grounding a substrate of the device. By floating/grounding a drain of the device and/or by floating/grounding the source of the device, the first memory and the second memory bit are programmed. The pulse train voltage includes 10 to 1000 pulses. One pulse includes a peak voltage and a base voltage. The peak voltage ranges from 0.5 V to 10 V. A duration of the peak voltage ranges from 1 nanosecond to 1 millisecond. The base voltage is 0 V. A duration of the base voltage ranges from 1 nanosecond to 1 millisecond.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: November 18, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Chang Chang, Chih-Hao Dai, Fu-Yen Jian, Wen-Hung Lo, Shih-Chieh Chang, Ying-Lang Wang
  • Publication number: 20140043899
    Abstract: A method for performing a programming operation to a first memory bit and a second memory bit of a device is described. The method includes applying a pulse train voltage to a metal gate of the device and grounding a substrate of the device. By floating/grounding a drain of the device and/or by floating/grounding the source of the device, the first memory and the second memory bit are programmed. The pulse train voltage includes 10 to 1000 pulses. One pulse includes a peak voltage and a base voltage. The peak voltage ranges from 0.5 V to 10 V. A duration of the peak voltage ranges from 1 nanosecond to 1 millisecond. The base voltage is 0 V. A duration of the base voltage ranges from 1 nanosecond to 1 millisecond.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Ting-Chang Chang, Chih-Hao Dai, Fu-Yen Jian, Wen-Hung Lo, Shih-Chieh Chang, Ying-Lang Wang
  • Publication number: 20130293477
    Abstract: An electronic apparatus and an operation method thereof are provided. The electronic apparatus has a sensor module. A space operation mode is enabled when an operation object is detected in a sensor space by the sensor module. A controlling function corresponding to one of a plurality of using spaces divided from the sensor space in which the operation object is located is enabled. Movement information of the operation object is detected by the sensor module, and an operation action corresponding to the enabled controlling function is executed.
    Type: Application
    Filed: April 26, 2013
    Publication date: November 7, 2013
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Yi-Fu Chen, Yu-Hsu Pei, Zhi-Sheng Lin, Wei-Han Hu, Wei-Jung Chen, Wen-Hung Lo, Hsin-pei Tsai, Ming-Che Weng, Li-Wei Chen, Po-Hsien Yang, Chun-Sheng Chen