Abstract: The present invention includes polishing the wafer backside by a grinder. Subsequently, a glass is laminated on the wafer backside surface by using epoxy. Then, the wafer is etched to isolate the dies. An epoxy is then coated on the wafer by means of vacuum coating process. Then, a curing step is performed by using the ultraviolet (UV) radiation to harden the epoxy. A grinding process is optional used to grind the epoxy on the wafer circuit side. A plurality of pad openings is formed in the epoxy. Subsequently, a pad circuit re-distribution is arranged over the upper surface of the epoxy. A solder mask covers the epoxy and the pad circuit for isolation. A printing process is carried out to print solder on the pre-determined area and the solder contacts to the pad circuit. Then, the solder is re-flow, and the wafer is then set to a testing apparatus for wafer level testing.