Abstract: A backlight module includes a light-emitting substrate, at least one chip-on-film and a backplane. The light-emitting substrate includes a signal line group and a plurality of light-emitting units, and the plurality of light-emitting units are electrically connected to the signal line group. The at least one chip-on-film is arranged on a non-light exit side of the light-emitting substrate, and electrically connected to the signal line group. The backplane is disposed on the non-light exit side of the light-emitting substrate, and the at least one chip-on-film is located between the backplane and the light-emitting substrate. The backplane is provided with a groove therein, a notch of the groove faces the light-emitting substrate, and at least portion of a chip-on-film film of the at least one chip-on-film is disposed in the groove.

Abstract: Backlight module and display device are provided. Backlight module is for providing light source for display panel. Display panel has bonding side at a side of display panel in first direction. Backlight module includes: back plate, including base plate at backlight side of display panel, and first side plate at bonding side, where a side of first side plate away from base plate is bent towards direction away from center of base plate to form top plate supporting display panel; rubber frame, including second side plate at bonding side, where first opening is in middle of second side plate in extension direction of second side plate to accommodate first side plate; main circuit board, including opposite first and second ends in first direction, where first end is inserted between top plate and first side plate, and second end has first bonding area for bonding connection with display panel.

Abstract: The present disclosure relates to the fabrication method for fan-out packages, in which packaging material layers (including a molding layer and/or a redistribution layer) are formed on both the upper and lower surfaces of a supporting carrier using a dual-sided carrier packaging method. The stress generated by the packaging material layer(s) on the upper surface is opposite to, while similar to or about equal in magnitude as, the stress generated by the packaging material layer(s) on the lower surface. Thus, the stress generated by forming the packaging material layers on two opposite sides of the carrier can offset each other, reducing or eliminating the degree of warpage, resulting in improved packaging efficiency and yield.

Abstract: Disclosed are a channel device for surgery and a trigger structure. It aims at improving the problem that the operational efficiency of existing channel devices for surgery is not high. The channel device for surgery includes: a binding cord configured to be wound around a metal net; and a binding wire configured to pass through the binding cord and tighten up the binding cord, so as to compress the metal net, or configured to be pulled away from the binding cord, so as to loosen the binding cord and the metal net. In the trigger structure, different first locking portions are configured to cooperate with a first engaging portion, so as to drive the trolley to slide intermittently relative to the handle, such that a second engaging portion cooperates with different second locking portions, hereby locking the sliding trolley in different positions on the handle.

Abstract: This application discloses a housing assembly, a battery cell and an assembling method thereof, a battery, and an electrical device. The electrical device includes the battery. The battery includes the battery cell. The battery cell includes an electrode assembly and a housing assembly. The housing assembly includes: a housing body with a receptacle, a first housing section disposed at an edge of an opening of the receptacle, and a second housing section disposed at one end of the first housing section, the end being away from the housing body. An inner diameter of the second housing section is greater than an inner diameter of the housing body. The end cap is at least partially accommodated in the second housing section and configured to work together with the housing to package the electrode assembly. The assembling method of the battery cell includes: encasing, end cap engagement, and packaging.

Abstract: Embodiments of the present disclosure relate to a solar cell and a method for producing the same. The solar cell includes: a substrate having a first textured surface, a plurality of sheet-shaped anti-reflection films, and a plurality of grid lines. A plurality of grid-line areas spaced from each other are formed on the first textured surface, and each grid-line area has a second textured surface. One or more sheet-shaped anti-reflection films of the plurality of sheet-shaped anti-reflection films are formed on a portion of the second textured surface of each grid-line area. Each grid line of the plurality of grid lines is formed on a respective grid-line area, and each grid line is in contact with the one or more sheet-shaped anti-reflection films and with a remaining portion of the second textured surface of the respective grid-line area not covered by any sheet-shaped anti-reflection films. grid linegrid line.

Abstract: Embodiments of the present disclosure relate to a solar cell and a method for producing the same. The solar cell includes: a substrate having a first textured surface, a plurality of sheet-shaped anti-reflection films, and a plurality of grid lines. A plurality of grid-line areas spaced from each other are formed on the first textured surface, and each grid-line area has a second textured surface. One or more sheet-shaped anti-reflection films of the plurality of sheet-shaped anti-reflection films are formed on a portion of the second textured surface of each grid-line area. Each grid line of the plurality of grid lines is formed on a respective grid-line area, and each grid line is in contact with the one or more sheet-shaped anti-reflection films and with a remaining portion of the second textured surface of the respective grid-line area not covered by any sheet-shaped anti-reflection films.

Abstract: A solar cell is provided, including a substrate having a first surface and a second surface opposite to each other, an emitter formed on the first surface of the substrate and including a textured structure on a side away from the first surface, a passivation structure formed on the textured structure, first electrodes penetrating the passivation structure and in electrical contact with the textured structure of the emitter, and conductive eutectic layers each formed between a respective first electrode and the emitter and including first conductive particles and second conductive particles. Each of the first conductive particles has a shape different from a shape of any of the second conductive particles. The first conductive particles and the second conductive particles have a first number, the first conductive particles have a second number, and a ratio of the second number to the first number in a range of 20% to 80%.

Abstract: A solar cell and a photovoltaic module are provided. The solar cell includes an N-type substrate having a front surface and a rear surface, a passivation stack disposed on the front surface, and a tunneling oxide layer and a doped conductive layer disposed on the rear surface. The passivation stack includes an oxygen-containing dielectric layer including a metal oxide material, a first passivation layer including an oxygen-containing silicon nitride material, and a second passivation layer including a silicon oxynitride material. A thickness of the oxygen-containing dielectric layer is in a range of 1 nm to 15 nm in a direction perpendicular to the front surface, a thickness of the first passivation layer is in a range of 30 nm to 60 nm in the direction perpendicular to the front surface, and a thickness of the second passivation layer is in a range of 20 nm to 40 nm in the direction perpendicular to the front surface.

Abstract: A solar cell, a manufacturing method therefor, and a photovoltaic module are provided. The solar cell includes a substrate having a front surface and a rear surface, a passivation stack disposed on the front surface, and a tunneling oxide layer and a doped conductive layer disposed on the rear surface. The passivation stack includes an oxygen-containing dielectric layer, a first passivation layer and a second passivation layer. The first passivation layer includes a first interface adjacent to the oxygen-containing dielectric layer and a second interface adjacent to the second passivation layer, the second passivation layer includes a third interface opposite to the second interface, a nitrogen content and a silicon content at the second interface are higher than those at the first interface and the third interface, respectively, and an oxygen content at the second interface is lower than that at the first interface and the third interface, respectively.

Abstract: A method of determining one or more properties of a sample, comprising: determining, at a plurality of generation sites of the sample, a plurality of acoustic velocity measurements, the plurality of acoustic velocity measurements using different acoustic propagation directions; and determining a best fit elasticity for the acoustic velocity measurements at different acoustic propagation directions at the plurality of generation sites, wherein determining a best fit elasticity comprises assuming a common elasticity for the plurality of generation sites while allowing crystallographic orientation to vary.

Abstract: The solar cell includes a silicon substrate, multiple first electrodes, and multiple second electrodes. The solar cell further includes a tunneling oxide layer, multiple doped polysilicon layers, and at least one barrier layer. The at least one barrier layer is arranged between every adjacent two doped polysilicon layers in the multiple doped polysilicon layers, and the multiple first electrodes are electrically connected to different doped polysilicon layers. The solar cell provided according to the present application can reduce the total thickness of the polycrystalline silicon layer, so that a thinner polycrystalline silicon layer can reduce parasitic absorption, thereby increasing short-circuit current. Moreover, the risk of slurry burning through the tunneling oxide layer is reduced by the barrier layer, while reducing metal recombination, which increases the open circuit voltage of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

Abstract: Apparatuses, systems, and techniques to train/use one or more neural networks. In at least one embodiment, a processor comprises one or more circuits to cause neural network training information to be aggregated based, at least in part, on contribution of the neural network training data and one or more performance metrics of the neural network.

Abstract: A semiconductor die is provided. The semiconductor die includes a D2D transceiver composed of a single die or dual dies. The D2D transceiver includes a first D2D transmitter and a first D2D receiver. The D2D transmitter is configured to send data to a second D2D receiver in a second D2D transceiver of another semiconductor die using a first reference clock signal. The D2D receiver is configured to receive data from a second D2D transmitter in the second D2D transceiver using a second reference clock signal. Through using the embodiments of the disclosure, a transmission solution may be flexibly configured for a multi-application scenario including D2D.

Abstract: Apparatuses, systems, and techniques to perform federated training of neural networks while maintaining control over dissemination of local models of neural networks from which aspects of local training data might be extracted. In at least one embodiment, a neural network is trained on local training data and a local model is provided to be aggregated with other local models into a global model that is in turn used for further local model training, wherein a provided local model or training is adjusted to reduce an ability to extract aspects of local training data therefrom.

Abstract: The solar cell includes a silicon substrate, multiple first electrodes, and multiple second electrodes. The solar cell further includes a tunneling oxide layer, multiple doped polysilicon layers, and at least one barrier layer. The at least one barrier layer is arranged between every adjacent two doped polysilicon layers in the multiple doped polysilicon layers, and the multiple first electrodes are electrically connected to different doped polysilicon layers. The solar cell provided according to the present application can reduce the total thickness of the polycrystalline silicon layer, so that a thinner polycrystalline silicon layer can reduce parasitic absorption, thereby increasing short-circuit current. Moreover, the risk of slurry burning through the tunneling oxide layer is reduced by the barrier layer, while reducing metal recombination, which increases the open circuit voltage of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

Abstract: The photovoltaic cell includes a silicon substrate, a first passivation layer, a second passivation layer, at least one silicon oxynitride layer, and at least one silicon nitride layer. The second passivation layer includes a first silicon oxide layer and at least one aluminum oxide layer, and a thickness of the at least one aluminum oxide layer is in a range of 4 nm to 20 nm. The number of silicon atoms is greater than the number of oxygen atoms in the at least one silicon oxynitride layer and the number of oxygen atoms is greater than the number of nitride atoms in the at least one silicon oxynitride layer. The first silicon oxide layer is disposed between the substrate and the at least one aluminum oxide layer, and a thickness of the first silicon oxide layer is in a range of 0.1 nm to 5 nm.

Abstract: A solar cell, a method for producing a solar cell and a solar cell module are provided. The solar cell includes: a substrate having a front surface and a rear surface opposite to the front surface; a first passivation layer, a second passivation layer and a third passivation layer sequentially formed on the front surface and in a direction away from the front surface; wherein the first passivation layer includes a dielectric material; the second passivation layer includes a first silicon nitride SimNn material, and a ratio of n/m is 0.5˜1; the third passivation layer includes a silicon oxynitride SiOiNj material, and a ratio of j/i is 0.1˜0.6; and a tunneling oxide layer and a doped conductive layer sequentially formed on the rear surface and in a direction away from the rear surface, wherein the doped conductive layer and the substrate have a doping element of a same conductivity type.

Abstract: The tracing method according to the present disclosure includes: coding solar cells disposed in a loading frame according to a frame code of a loading frame, such that each respective solar cell has a respective cell code; obtaining respective process information of the respective solar cell according to a loading order, where the process information includes a code of a process carrier, a code of a workbench and a position code of a solar cell in the process carrier; uploading cell codes and process information of the solar cells to a computer system; and recording and associating, by the computer system, the respective cell code and the respective process information.

Abstract: The method for preparing a solar cell includes providing a substrate having a first surface and a second surface opposite to the first surface; forming a doped layer and a first passivation layer stacked sequentially in a direction away from the substrate on the first surface; forming a second passivation layer on the second surface; forming multiple first grid line electrodes arranged at intervals on the surface of the first passivation layer away from the substrate, and forming multiple second grid line electrodes arranged at intervals on the surface of the second passivation layer away from the substrate; performing a laser processing on the multiple first grid line electrodes and an adjacent region of the multiple first grid line electrodes, and applying a reverse current between the multiple first grid line electrodes and the multiple second grid line electrodes.