Abstract: A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.

Abstract: One embodiment of the present invention provides a method for fabricating a group III-V p-type nitride structure. The method comprises growing a first layer of p-type group III-V material with a first acceptor density in a first growing environment. The method further comprises growing a second layer of p-type group III-V material, which is thicker than the first layer and which has a second acceptor density, on top of the first layer in a second growing environment. In addition, the method comprises growing a third layer of p-type group III-V material, which is thinner than the second layer and which has a third acceptor density, on top of the second layer in a third growing environment.

Abstract: One embodiment of the present invention provides a method for fabricating a group III-V nitride structure with an ohmic-contact layer. The method involves fabricating a group III-V nitride structure with a p-type layer. The method further involves depositing an ohmic-contact layer on the p-type layer without first annealing the p-type layer. The method also involves subsequently annealing the p-type layer and the ohmic-contact layer in an annealing chamber at a predetermined temperature for a predetermined period of time, thereby reducing the resistivity of the p-type layer and the ohmic contact in a single annealing process.

Abstract: One embodiment of the present invention provides a method for fabricating light-emitting diodes. The method includes etching grooves on a growth substrate, thereby creating mesas on the growth substrate. The method further includes fabricating on each of the mesas an indium gallium aluminum nitride (InGaAlN) multilayer structure which contains a p-type layer, a multi-quantum-well layer, and an n-type layer. In addition, the method includes depositing one or more metal substrate layers on top of the InGaAlN multilayer structure. Moreover, the method includes removing the growth substrate. Furthermore, the method includes creating electrodes on both sides of the InGaAlN multilayer structure, thereby resulting in a vertical-electrode configuration.

Abstract: There is provided an InGaAlN light-emitting device and a manufacturing method thereof. The light emitting device includes a conductive substrate having a main surface and a back surface, a metal bonding layer formed on the main surface of the substrate, a light reflecting layer formed on the bonding layer, a semiconductor multilayer structure including at least a p-type and an n-type InGaAlN layer disposed on the reflecting layer, the p-type InGaAlN layer directly contacting the reflecting layer, and ohmic electrodes disposed on said n-type InGaAlN layer and on the back surface of the conductive substrate, respectively.

Abstract: One embodiment of the present invention provides a semiconductor light-emitting device which includes a multi-layer structure. The multilayer structure comprises a first doped layer, an active layer, and a second doped layer. The semiconductor light-emitting device further includes a first Ohmic-contact layer configured to form a conductive path to the first doped layer, a second Ohmic-contact layer configured to form a conductive path to the second doped layer, and a support substrate comprising not less than 15% chromium (Cr) measured in weight percentage.

Abstract: A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.

Abstract: A method for fabricating a group III-V n-type nitride structure comprises fabricating a growth Si substrate and then depositing a group III-V n-type layer above the Si substrate using silane gas (SiH4) as a precursor at a flow rate set to a first predetermined value (210). Subsequently, the SiH4 flow rate is reduced to a second predetermined value during the fabrication of the n-type layer (220). The method also comprises forming a multi-quantum-well active region above the n-type layer. In addition, the flow rate is reduced over a predetermined period of time, and the second predetermined value is reached at a predetermined, sufficiently small distance from the interface between the n-type layer and the active region (230).

Abstract: One embodiment of the present invention provides a gallium nitride (GaN)-based semiconductor light-emitting device (LED) which includes an n-type GaN-based semiconductor layer (n-type layer); an active layer; and a p-type GaN-based semiconductor layer (p-type layer). The n-type layer is epitaxially grown by using ammonia gas (NH3) as the nitrogen source prior to growing the active layer and the p-type layer. The flow rate ratio between group V and group III elements is gradually reduced from an initial value to a final value. The GaN-based LED exhibits a reverse breakdown voltage equal to or greater than 60 volts.

Abstract: A method for fabricating a semiconductor light-emitting device based on a strain adjustable multilayer semiconductor film is disclosed. The method includes epitaxially growing a multilayer semiconductor film on a growth substrate, wherein the multilayer semiconductor film comprises a first doped semiconductor layer, a second doped semiconductor layer, and a multi-quantum-wells (MQW) active layer; forming an ohmic-contact metal layer on the first doped semiconductor layer; depositing a metal substrate on top of the ohmic-contact metal layer, wherein the density and/or material composition of the metal substrate is adjustable along the vertical direction, thereby causing the strain in the multilayer semiconductor film to be adjustable; etching off the growth substrate; and forming an ohmic-electrode coupled to the second doped semiconductor layer.

Abstract: One embodiment of the present invention provides a method for fabricating light-emitting diodes. The method includes etching grooves on a growth substrate, thereby creating mesas on the growth substrate. The method further includes fabricating on each of the mesas an indium gallium aluminum nitride (InGaAlN) multilayer structure which contains a p-type layer, a multi-quantum-well layer, and an n-type layer. In addition, the method includes depositing one or more metal substrate layers on top of the InGaAlN multilayer structure. Moreover, the method includes removing the growth substrate. Furthermore, the method includes creating electrodes on both sides of the InGaAlN multilayer structure, thereby resulting in a vertical-electrode configuration.

Abstract: A method for fabricating quantum wells by using indium gallium nitride (InGaN) semiconductor material includes fabricating a potential well on a layered group III-V nitride structure at a first predetermined temperature in a reactor chamber by injecting into the reactor chamber an In precursor gas and a Ga precursor gas. The method further includes, subsequent to the fabrication of the potential well, terminating the Ga precursor gas, maintaining a flow of the In precursor gas, and increasing the temperature in the reactor chamber to a second predetermined temperature while adjusting the In precursor gas flow rate from a first to a second flow rate. In addition, the method includes annealing and stabilizing the potential well at the second predetermined temperature while maintaining the second flow rate. The method also includes fabricating a potential barrier above the potential well at the second predetermined temperature while resuming the Ga precursor gas.

Abstract: One embodiment of the present invention provides a semiconductor light-emitting device, which comprises: an upper cladding layer; a lower cladding layer; an active layer between the upper and lower cladding layers; an upper ohmic-contact layer forming a conductive path to the upper cladding layer; and a lower ohmic-contact layer forming a conductive path the lower cladding layer. The lower ohmic-contact layer has a shape substantially different from the shape of the upper ohmic-contact layer, thereby diverting a carrier flow away from a portion of the active layer which is substantially below the upper ohmic-contact layer when a voltage is applied to the upper and lower ohmic-contact layers.

Abstract: One embodiment of the present invention provides a semiconductor light-emitting device which includes: (1) a silicon (Si) substrate; (2) a silver (Ag) transition layer which is formed on a surface of the Si substrate, wherein the Ag transition layer covers the Si substrate surface; and (3) an InGaAlN, ZnMgCdO, or ZnBeCdO-based semiconductor light-emitting structure which is fabricated on the Ag-coated Si substrate. Note that the Ag transition layer prevents the Si substrate surface from forming an amorphous overcoat with reactant gases used for growing the semiconductor light-emitting structure.

Abstract: There is provided a method of fabricating InGaAlN film on a silicon substrate, which comprises the following steps of forming a pattern structured having grooves and mesas on the silicon substrate, and depositing InGaAlN film on the surface of substrate, wherein the depth of the grooves is more than 6 nm, and the InGaAlN film formed on the mesas of both sides of the grooves are disconnected in the horizontal direction. The method may grow high quality, no crack and large area of InGaAlN film by simply treating the substrate. At the same time, there is also provided a method of fabricating InGaAlN light-emitting device by using the silicon substrate.

Abstract: One embodiment of the present invention provides a gallium nitride (GaN)-based semiconductor light-emitting device (LED) which includes an n-type GaN-based semiconductor layer (n-type layer); an active layer; and a p-type GaN-based semiconductor layer (p-type layer). The n-type layer is epitaxially grown by using ammonia gas (NH3) as the nitrogen source prior to growing the active layer and the p-type layer. The flow rate ratio between group V and group III elements is gradually reduced from an initial value to a final value. The GaN-based LED exhibits a reverse breakdown voltage equal to or greater than 60 volts.

Abstract: One embodiment of the present invention provides a method for fabricating a group III-V nitride structure with an ohmic-contact layer. The method involves fabricating a group III-V nitride structure with a p-type layer. The method further involves depositing an ohmic-contact layer on the p-type layer without first annealing the p-type layer. The method also involves subsequently annealing the p-type layer and the ohmic-contact layer in an annealing chamber at a predetermined temperature for a predetermined period of time, thereby reducing the resistivity of the p-type layer and the ohmic contact in a single annealing process.

Abstract: One embodiment of the present invention provides a method for fabricating a high-quality metal substrate. During operation, the method involves cleaning a polished single-crystal substrate. A metal structure of a predetermined thickness is then formed on a polished surface of the single-crystal substrate. The method further involves removing the single-crystal substrate from the metal structure without damaging the metal structure to obtain the high-quality metal substrate, wherein one surface of the metal substrate is a high-quality metal surface which preserves the smoothness and flatness of the polished surface of the single-crystal substrate.

Abstract: One embodiment of the present invention provides a semiconductor light-emitting device. The semiconductor light-emitting device includes a substrate, a p-type doped InGaAIN layer, an n-type doped InGaAIN layer, and an active layer situated between the p-type doped and n-type doped InGaAIN layers. The semiconductor light-emitting device further includes an n-side Ohmic-contact layer coupled to an N-polar surface of the n-type doped InGaAIN layer. The Ohmic-contact layer comprises at least one of Au, Ni, and Pt, and at least one of group IV elements.

Abstract: A semiconductor light-emitting device, the device includes a substrate, a semiconductor stacked layer, a lead electrode and a lead, wherein the semiconductor stacked layer at least includes a N-type layer and a P-type layer, at least one of the N-type layer and the P-type layer has an opening, the opening is just beneath the lead; or includes a conductive substrate having a main surface and a back surface, an adhesive metal layer, a reflective/ohmic metal layer, a semiconductor stacked layer, a lead electrode and a lead sequentially deposited on the main surface of the substrate, the reflective/ohmic metal layer has an opening, the opening is just beneath the lead.