Patents by Inventor William D. Rhoden

William D. Rhoden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5454076
    Abstract: An image is written to a data frame buffer for display by a monitor. The image includes a repeated pattern. The present invention uses a repeated pattern cache which is not large enough to simultaneously contain an entire repeated pattern. When writing a pixel of the image, a horizontal pattern offset and a vertical pattern offset for a destination location of the pixel are determined. If a scan line for the repeated pattern which corresponds to the vertical pattern offset does not reside in the repeated pattern cache, the scan line for the repeated pattern which corresponds to the vertical pattern offset is fetched into the repeated pattern cache. When the scan line for the repeated pattern which corresponds to the vertical pattern offset resides in the repeated pattern cache, the pixel is accessed at a location in the repeated pattern cache at a location which corresponds to the horizontal pattern offset. The accessed pixel is written to the buffer.
    Type: Grant
    Filed: March 2, 1994
    Date of Patent: September 26, 1995
    Assignee: VLSI Technology, Inc.
    Inventors: Bradley W. Cain, Rajeev Jayavant, William D. Rhoden