Patents by Inventor William M. Clark

William M. Clark has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069161
    Abstract: In one embodiment, a lidar system includes a wavelength-tunable light source configured to emit pulses of light, each emitted pulse of light having a particular wavelength of multiple different wavelengths. The lidar system also includes a scanner configured to scan the emitted pulses of light across a field of regard of the lidar system. The scanner includes (i) a beam deflector configured to angularly deflect each emitted pulse of light along a first scan axis according to the particular wavelength of the emitted pulse of light and (ii) a scan mirror configured to scan the emitted pulses of light along a second scan axis different from the first scan axis. The lidar system further includes a receiver configured to detect a received pulse of light that includes a portion of one of the emitted pulses of light scattered by a target located a distance from the lidar system.
    Type: Application
    Filed: January 4, 2023
    Publication date: February 29, 2024
    Inventors: Joseph G. LaChapelle, Jason M. Eichenholz, Roger S. Cannon, Stephen D. Gaalema, William R. Clark, Alex Michael Sincore
  • Patent number: 9981948
    Abstract: Disclosed are novel crystalline salts of (S)-6-((1-acetylpiperidin-4-yl)amino)-N-(3-(3,4-dihydroisoquinolin-2(1H)-yl)-2-hydroxypropyl)pyrimidine-4-carboxamide and pharmaceutical compositions containing the same. Also disclosed are processes for the preparation thereof and methods for use thereof.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: May 29, 2018
    Assignee: GiaxoSmithKline Intellectual Property Development Limited
    Inventors: William M. Clark, Rajendra S. Sathe
  • Publication number: 20180099948
    Abstract: Disclosed are novel crystalline salts of (S)-6-((1-acetylpiperidin-4-yl)amino)-N-(3-(3,4-dihydroisoquinolin-2(1H)-yl)-2-hydroxypropyl)pyrimidine-4-carboxamide and pharmaceutical compositions containing the same. Also disclosed are processes for the preparation thereof and methods for use thereof.
    Type: Application
    Filed: December 13, 2017
    Publication date: April 12, 2018
    Inventors: William M. Clark, Rajendra S. Sathe
  • Patent number: 9884846
    Abstract: Disclosed are novel crystalline salts of (S)-6-((1-acetylpiperidin-4-yl)amino)-N-(3-(3,4-dihydroisoquinolin-2(1H)-yl)-2-hydroxypropyl)pyrimidine-4-carboxamide and pharmaceutical compositions containing the same. Also disclosed are processes for the preparation thereof and methods for use thereof.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: February 6, 2018
    Assignee: GLAXOSMITHKLINE INTELLECTUAL PROPERTY DEVELOPMENT LIMITED
    Inventors: William M. Clark, Rajendra S. Sathe
  • Publication number: 20170283404
    Abstract: Disclosed are novel crystalline forms of 2-(4-(4-ethoxy-6-oxo-1,6-dihydropyridin-3-yl)-2-fluorophenyl)-N-(5-(1,1,1-trifluoro-2-methylpropan-2-yl)isoxazol-3-yl)acetamide and pharmaceutical compositions containing the same. Also disclosed are processes for the preparation thereof and methods for use thereof.
    Type: Application
    Filed: September 4, 2015
    Publication date: October 5, 2017
    Applicant: GlaxoSmithKline Intellectual Property Development Limited
    Inventors: Mui CHEUNG, William M. CLARK, Hilary Schenck EIDAM, Kimberly Anne LAMEY, James V. THOMAS
  • Publication number: 20170190688
    Abstract: Disclosed are novel crystalline salts of (S)-6-((1-acetylpiperidin-4-yl)amino)-N-(3-(3,4-dihydroisoquinolin-2(1H)-yl)-2-hydroxypropyl)pyrimidine-4-carboxamide and pharmaceutical compositions containing the same. Also disclosed are processes for the preparation thereof and methods for use thereof.
    Type: Application
    Filed: June 23, 2015
    Publication date: July 6, 2017
    Inventors: William M. CLARK, Rajendra S. SATHE
  • Patent number: 8679908
    Abstract: A technique for and structures for camouflaging an integrated circuit structure. A layer of conductive material having a controlled outline is disposed to provide artifact edges of the conductive material that resemble an operable device when in fact the device is not operable.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: March 25, 2014
    Assignees: HRL Laboratories, LLC, Raytheon Company
    Inventors: Lap-Wai Chow, William M. Clark, Jr., Gavin J. Harbison, James P. Baukus
  • Patent number: 8564073
    Abstract: A technique for and structures for camouflaging an integrated circuit structure and strengthen its resistance to reverse engineering. A plurality of transistors are formed in a semiconductor substrate, at least some of the transistors being of the type having sidewall spacers with LDD regions formed under the sidewall spacers. Transistors are programmably interconnected with ambiguous interconnection features, the ambiguous interconnection features each comprising a channel formed in the semiconductor substrate with preferably the same dopant density as the LDD regions, with selected ones of the channels being formed of a conductivity type supporting electrical communication between interconnected active regions and with other selected ones of the channels being formed of a conductivity type inhibiting electrical communication but ambiguously appearing to a reverse engineer as supporting electrical communication.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: October 22, 2013
    Assignee: HRL Laboratories, LLC
    Inventors: William M. Clark, Jr., Lap Wai Chow, Gavin Harbison, Paul Ouyang
  • Patent number: 8524553
    Abstract: A technique for and structures for camouflaging an integrated circuit structure. The integrated circuit structure is formed having a well of a first conductivity type under the gate region being disposed adjacent to active regions of a first conductivity type. The well forming an electrical path between the active regions regardless of any reasonable voltage applied to the integrated circuit structure.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: September 3, 2013
    Assignee: HRL Laboratories, LLC
    Inventors: Lap-Wai Chow, William M. Clark, Jr., James P Baukus, Gavin J. Harbison
  • Patent number: 8296577
    Abstract: An apparatus and method for preventing information leakage attacks through a polarized cryptographic bus architecture. The polarized cryptographic bus architecture randomly changes the polarity of the target bit such that the leaked information cannot be consistently averaged to yield statistical key material. Further, to increase the prevention of information leakage attacks, a set of dual rails is used to write data to a given register bit.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: October 23, 2012
    Assignee: HRL Laboratories, LLC
    Inventors: David B. Shu, Lap-Wai Chow, William M. Clark, Jr.
  • Patent number: 8258583
    Abstract: A technique for and structures for camouflaging an integrated circuit structure. The integrated circuit structure is formed by a plurality of layers of material having a controlled outline. A layer of conductive material having a controlled outline is disposed among said plurality of layers to provide artifact edges of the conductive material that resemble one type of transistor (operable vs. non-operable), when in fact another type of transistor was used.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: September 4, 2012
    Assignee: HRL Laboratories, LLC
    Inventors: Lap-Wai Chow, William M. Clark, Jr., Gavin J. Harbison, James P. Baukus
  • Patent number: 8168487
    Abstract: A technique for and structures for camouflaging an integrated circuit structure and strengthen its resistance to reverse engineering. A plurality of transistors are formed in a semiconductor substrate, at least some of the transistors being of the type having sidewall spacers with LDD regions formed under the sidewall spacers. Transistors are programmably interconnected with ambiguous interconnection features, the ambiguous interconnection features each comprising a channel formed in the semiconductor substrate with preferably the same dopant density as the LDD regions, with selected ones of the channels being formed of a conductivity type supporting electrical communication between interconnected active regions and with other selected ones of the channels being formed of a conductivity type inhibiting electrical communication but ambiguously appearing to a reverse engineer as supporting electrical communication.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: May 1, 2012
    Assignee: HRL Laboratories, LLC
    Inventors: William M. Clark, Jr., Lap Wai Chow, Gavin Harbison, Paul Ouyang
  • Patent number: 8065532
    Abstract: An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: November 22, 2011
    Assignee: HRL Laboratories, LLC
    Inventors: David B. Shu, Lap-Wai Chow, William M. Clark, Jr.
  • Patent number: 8049281
    Abstract: A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity type resulting in a transistor that is always non-operational when standard voltages are applied to the device.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: November 1, 2011
    Assignee: HRL Laboratories, LLC
    Inventors: Lap-Wai Chow, William M. Clark, Jr., Gavin J. Harbison, Paul Ou Yang
  • Patent number: 7949883
    Abstract: An apparatus and method for preventing information leakage attacks that utilize timeline alignment. The apparatus and method inserts a random number of instructions into an encryption algorithm such that the leaked information can not be aligned in time to allow an attacker to break the encryption.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: May 24, 2011
    Assignee: HRL Laboratories, LLC
    Inventors: David B. Shu, Lap-Wai Chow, William M. Clark, Jr.
  • Patent number: 7935603
    Abstract: A technique for and structures for camouflaging an integrated circuit structure. The technique including forming active areas of a first conductivity type and LDD regions of a second conductivity type resulting in a transistor that is always non-operational when standard voltages are applied to the device.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: May 3, 2011
    Assignees: HRL Laboratories, LLC, Raytheon Corporation, Promtek
    Inventors: Lap-Wai Chow, William M. Clark, Jr., Gavin J. Harbison, Paul Ou Yang
  • Patent number: 7888213
    Abstract: A technique for and structures for camouflaging an integrated circuit structure. The integrated circuit structure is formed by a plurality of layers of material having a controlled outline. A layer of conductive material having a controlled outline is disposed among said plurality of layers to provide artifact edges of the conductive material that resemble one type of transistor (operable vs. non-operable), when in fact another type of transistor was used.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: February 15, 2011
    Assignee: HRL Laboratories, LLC
    Inventors: Lap-Wai Chow, William M. Clark, Jr., Gavin J. Harbison, James P. Baukus
  • Patent number: 7777977
    Abstract: A flame scanner collimator, which monitors flames produced by a fossil fuel fired combustion chamber, includes: a substantially cylindrical collimator body defining a hollow portion; a first chamber connected to a second chamber, the first and second chambers defining the hollow portion, the second chamber having a larger diameter than the first chamber; and a plurality of slots each extending in substantially a same direction as a longitudinal axis defining the body. Each slot extends through the body to the first and second chambers to allow cooling/purge air flow therethrough.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: August 17, 2010
    Assignee: ALSTOM Technology Ltd
    Inventors: Paul H. Chase, William M. Clark, III, Pio Joseph Fusco
  • Patent number: 7646005
    Abstract: An apparatus for varying a length of a flame scanner assembly for monitoring a flame includes a mounting shaft which connects to a fiber optic cable assembly; and a spool assembly having a first end and a second opposite end. The first end connects to a detector head assembly and the second end is configured to connect to a guide pipe. The second end of the spool assembly receives one end of the mounting shaft and a length of the flame scanner assembly is adjusted via telescopic interconnection between the second end of the spool assembly and the one end of the mounting shaft such that longitudinal displacement therebetween may be varied by slidable displacement of the mounting shaft relative to the spool assembly.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: January 12, 2010
    Assignee: ALSTOM Technology Ltd
    Inventors: Paul H. Chase, William M. Clark, III, Pio Joseph Fusco
  • Publication number: 20090207510
    Abstract: A flame scanner collimator, which monitors flames produced by a fossil fuel fired combustion chamber, includes: a substantially cylindrical collimator body defining a hollow portion; a first chamber connected to a second chamber, the first and second chambers defining the hollow portion, the second chamber having a larger diameter than the first chamber; and a plurality of slots each extending in substantially a same direction as a longitudinal axis defining the body. Each slot extends through the body to the first and second chambers to allow cooling/purge air flow therethrough.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 20, 2009
    Applicant: ALSTOM TECHNOLOGY LTD.
    Inventors: Paul H. Chase, William M. Clark, III, Pio Joseph Fusco