Patents by Inventor William R. Krenik

William R. Krenik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6035320
    Abstract: A novel Finite Impulse Response filter (FIR) Filter is provided which includes a plurality of multipliers (14-22), a plurality of multiplexers (24-32), and a plurality of sample and hold circuits (34-42). At least two of the sample and hold circuit output signals (1-5) may be multiplexed in a round robin fashion to at least two of the multipliers (14-22). The multipliers may receive as a second input, fixed tap coefficient signals (C.sub.1 -C.sub.5) for multiplication with the multiplexed sample and hold circuit output signals (1-5).
    Type: Grant
    Filed: January 4, 1995
    Date of Patent: March 7, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Sami Kiriaki, William R. Krenik
  • Patent number: 6021015
    Abstract: A system for driving hard disk drive spindle and actuator motors is disclosed. The system comprises a spindle motor control circuit (120), a spindle motor power circuit (210), an actuator motor control circuit (110), and an actuator motor power circuit (210). The spindle motor control circuit (120) and the actuator motor control circuit (110) are formed on a first substrate (100). The spindle motor power circuit (210) and the actuator motor power circuit (220) are formed on a second substrate (200). The system also includes at least one disk (22) attached to a rotatable spindle (21), a spindle motor (400) for receiving and being energized by the spindle motor power signals, and for controlling the rotation of the spindle (21), a plurality of disk read heads (12) adjacent to the disks (22), and an actuator motor (300) for receiving and being energized by the actuator motor power signals, and for controlling the position of the disk read heads (12).
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: February 1, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Edward N. Jeffrey, William R. Krenik, David Cotton, Dennis V. Hahn, Shaibal Barua, Roy C. Jones, III
  • Patent number: 6011415
    Abstract: A shock sensor circuitry (26) is provided for processing an input signal generated by a shock sensor (28) in response to the shock sensor (28) detecting a force or shock. The shock sensor circuitry (26) includes a leakage tolerant input amplifier (38) for receiving the input signal, and any leakage currents that may also be provided, and amplifying the input signal to generate an amplified input signal. The leakage tolerant input amplifier (38) provides an ac gain of ten and a dc gain of zero. The shock sensor circuitry (26) also includes a filter and amplification circuit and a window comparator. The filter and amplification circuit filters the amplified input signal and amplifies select frequencies of the amplified input signal to generate a summed signal that is provided to the window comparator and compared to a reference value.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: January 4, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Dennis V. Hahn, Rolf Lagerquist, William R. Krenik
  • Patent number: 5994926
    Abstract: A programmably variable transconductance circuit (10) and method for varying its transconductance includes first and second current control input devices (16, 18), each having an input (17,19) to which a differential input voltage may be applied. A pair of current steering circuits (26, 28, 30, 32) are each connected in series with a respective one of the first and second current control devices (16, 18) for dividing respective currents in the first and second current control devices (16, 18) between a differential output current path (12, 14) and another current flow path, and a programmable voltage source (90) supplying V.sub.CONTROL is connected to control the current division by the current steering circuits (26, 28, 30, 32). The programmable voltage, V.sub.CONTROL, is provided by a programmable current control loop (90), which incorporates a master transconductance circuit, to establish a constant transconductance independently of temperature variations.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: November 30, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Patrick P. Siniscalchi, Davy H. Choi, William R. Krenik
  • Patent number: 5867001
    Abstract: A motor driver circuit (12) for providing drive signals to stator coils of a polyphase dc motor (10) includes a plurality of current paths, each connected between a supply voltage and a reference potential. Each current path includes two driver transistors (14,20, 16,22, 18,24), a node (A, B, C) of each of the stator coils being connectable between the driver transistors in respective current flow paths. A commutator (26) is connected to operate the driver transistors in a sequence in which drive currents are delivered for application in a predetermined sequence to the stator coils. A plurality of sensing transistors (32) are connected to produce a mirror current which mirrors a mirrored current in an associated driver transistor (20) in a respective current flow path. Circuitry (26) is provided which is responsive to the mirror currents of the sensing transistors to control the amplitudes of the currents in the associated driver transistor in a respective current flow path.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: February 2, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Rolf Lagerquist, William R. Krenik, Kenneth J. Maggio, Patrick G. O'Farrell
  • Patent number: 5699087
    Abstract: A method is provided for accessing data stored in memory (76). First data appearing at outputs (102) of memory (76) are read during a first reading cycle in a sequence of reading cycles, the first data retrieved from a first location in memory (76) corresponding to a first address. At the end of the first reading cycle, the first address is stepped to produce a second address corresponding to a second location in memory (76). During an idle period following the first reading cycle and prior to a second reading cycle occurring next in the sequence of reading cycles, second data is prefetched from the second location in memory (76) such that the second data appears at the bitlines (102) of memory (76) at the start of the second reading cycle.
    Type: Grant
    Filed: November 3, 1994
    Date of Patent: December 16, 1997
    Assignee: Texas Instruments
    Inventors: William R. Krenik, Louis J. Izzi
  • Patent number: 5693577
    Abstract: A sensor 20 is formed on semiconductor substrate 22. Dielectric layers 23 and 24 are formed on the face and backside of substrate 22, respectively. Metal leads 26 and 28 contact the substrate through openings in the dielectric layer 23. The leads 26 and 28 are also connected to the set of interleaved longitudinal contact fingers 27 and 29. Additionally, a pair of backside contacts 30 and 32 are formed on the dielectric layer 24. The backside contact 30 is in contact only with the metal lead 26 through a conductive region 34.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: December 2, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: William R. Krenik, Mark Appleton
  • Patent number: 5650950
    Abstract: A programmable, electronic filter (10) includes a memory device such as a Read Only Memory ROM (22) for storing specific cut-off frequency adjustment data corresponding to various cut-off frequencies. The ROM (22) receives a ROM address (28) corresponding to a cut-off frequency signal (26). The ROM (22) generates a specific cut-off frequency adjustment value (30) for a digital-to-analog convertor (20) to produce an output reference current (34). A reference voltage (40), an error amplifier (14), a master transconductance element (16), and a capacitor (18) serve as a tuning loop and ultimately produce a control signal (38) in response to the output reference current (34). Control signal (38) serves as an input to slave filter (12) along with the cut-off frequency signal (26). The slave filter (12) may then serve as an electronic filter having the desired frequency-response characteristic.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: July 22, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Patrick P. Siniscalchi, William R. Krenik, Michael D. Aragon
  • Patent number: 5633569
    Abstract: A method of driving a motor without initial back rotation includes the steps of identifying a rest position 22 of a storage medium 20, mapping the rest position of storage medium 20 to a motor drive sequence, and driving the motor with the motor drive sequence, thereby enabling motor start-up without back rotation. The method is applicable to unipolar and bipolar drive methods as well as inductive read type and magneto-resistive type heads.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: May 27, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: James E. Chloupek, William R. Krenik, Michael G. Machado
  • Patent number: 5625209
    Abstract: A biomedical sensor (20) is formed on a semiconductor substrate (22). Insulated dielectric layers (23, 24) are formed on the face and backside of the semiconductor substrate (22). Metal leads (26, 28) contact the substrate (22) through openings in the dielectric layer (23). The leads (26, 28) are also each connected to a set of interleaved longitudinal contact fingers (27, 29). A pair of contacts (30, 32) are formed on the opposite side of the substrate (22) from the contact figures (27, 29). A conductive biologic sample is placed over the interleaf fingers (27, 29), electrical measurements can be made through backside contacts (30, 32) so resistance measurements can be taken.
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: April 29, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Mark Appleton, William R. Krenik
  • Patent number: 5623265
    Abstract: A flash analog-to-digital converter (8) is provided which includes a comparator array (10) which provides a thermometer code output THC1 through THC7. A binary search encoder (12) is coupled to the comparator array (8) as shown, and provides a binary code output B2 through B0.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: April 22, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Vivek J. Pawar, William R. Krenik
  • Patent number: 5596583
    Abstract: Test circuitry (90) is provided which includes a multiplexer (118) for selectively receiving multiple bit control words defining test functions to be executed by said test circuitry and for outputting data from said test circuitry. A plurality of digital data inputs (96) are provided for receiving multiple bit words of digital data and a plurality of analog data inputs (98) are provided for receiving analog data. A register (120) is coupled to multiplexer (118) for storing a one of the multiple bit words received by multiplexer (118). Control circuitry (122) is coupled to register (120) for controlling execution of the test function defined by the control word being held in register (120). First test circuitry (112) is coupled to digital data inputs (96) and control circuitry (122) for passing digital data words received at digital data inputs (96) to multiplexer (118) for output in response to a first control word of said control words being held in register (120).
    Type: Grant
    Filed: July 19, 1991
    Date of Patent: January 21, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: William R. Krenik, Louis J. Izzi, Chenwei J. Yin
  • Patent number: 5528179
    Abstract: A constant capacitance programmable transconductance input stage (36) includes a first transconductance device (50), second transconductance device (52), and first switch (44) for providing a programmable input stage with a constant input capacitance. The first transconductance device (50) has two inputs and the second transconductance device (52) has two inputs. A first positive input (22) couples directly to one input of the first transconductance device (50) while a first negative input (23) couples directly to one input of the second transconductance device (52). The first positive input (22) and the first negative input (23) are switchably coupled to the remaining inputs of first transconductance device (50) and second transconductance device (52). Depending on the configuration of the first switch (44), either both transconductance devices contribute to the overall transconductance of constant capacitance programmable transconductance input stage (36) or neither does.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: June 18, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Patrick P. Siniscalchi, William R. Krenik
  • Patent number: 5469195
    Abstract: An integrated circuit capacitor has a semiconductor die and a plurality of field effect transistors fabricated on the die and having gates, sources and drains. The gates are connected to each other as one side of the capacitor. The sources and drains are connected together as another side of the capacitor. A color palette has a die with circuitry including a dot clock buffer with transistors connected to supply rails and the integrated circuit capacitor having a plurality of the parallel-connected field effect transistors connected across the supply rails. The dot clock buffer has an output distributed directly to the rest of the circuitry. Other capacitors, buffers, systems and methods are also disclosed.
    Type: Grant
    Filed: August 9, 1994
    Date of Patent: November 21, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Henry T. Yung, Louis J. Izzi, William R. Krenik
  • Patent number: 5465058
    Abstract: An integrated circuit buffer includes a source follower output transistor having an output and also connected by a voltage dropping circuit to a supply rail thereby introducing a controlled amount of Miller effect capacitance in the source follower output transistor. The buffer also has a common source output transistor and a unidirectional conducting circuit connecting between the common source output transistor and the source follower output transistor. Other buffers, palette devices, computer graphics systems and methods are also disclosed.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: November 7, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: William R. Krenik, Louis J. Izzi
  • Patent number: 5410197
    Abstract: In a method and circuitry for sense amplification, a differential input voltage (84a-b) is input, and a differential output voltage (90a-b) is output. The differential output voltage (90a-b) is substantially minimized during a reset signal on a reset signal line (88). During the reset signal, the differential output voltage (90a-b) is biased in response to the differential input voltage (84a-b). After the reset signal, the differential output voltage (90a-b) is amplified in response to the biasing.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: April 25, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: William R. Krenik
  • Patent number: 5399994
    Abstract: A programmable VCO circuit (300, 700) and method of use are provided whereby a current proportional to the strength of the NMOS process used to fabricate the circuit may be subtracted from the control current derived at the circuit's input, to compensate for process variations. Also, a programmable VCO circuit (300) and method of use are provided whereby a current developed from one-half the supply voltage for the VCO circuit may be subtracted from the control current derived at the circuit's input, in order to cause programmed gain changes to occur about the center of the control voltage range, and minimize output "jitter" when the VCO is used in a phase-locked loop. A gain compensation circuit (800) is also provided to linearize the gain of the programmable VCO circuit (300) for higher control voltage levels and thereby extend the VCO's effective operating range.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: March 21, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Patrick P. Siniscalchi, William R. Krenik
  • Patent number: 5379408
    Abstract: A clock control circuit 84 is provided which includes circuitry 98 for selecting a master clock from among at least two input clocks provided to clock control circuit 94, the selection made in response to master clock selection control signals. Circuitry 104 is coupled to circuitry for selecting 98 for providing at least first and second divided down clocks each being of a different divide ratio of the master clock. Circuitry 108 is coupled to circuitry for providing divided down clocks 104 for selecting an output clock from between at least the first and second divided down clocks in response to output clock selection control signals received by clock control circuit 84.
    Type: Grant
    Filed: November 8, 1991
    Date of Patent: January 3, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Louis J. Izzi, William R. Krenik
  • Patent number: 5371552
    Abstract: A clamp circuit including a clamping capacitor and a differential amplifier charge and discharge the clamping capacitor in accordance with the magnitude of difference signals applied to the differential amplifier's inverting and non-inverting inputs. The inverting input receives the voltage produced by the clamping capacitor. This voltage is digitized by an analog-to-digital converter (ADC) and is set to a reference voltage range by a voltage divider network. The ADC output signal is compared to a given reference level corresponding to a selected voltage in the reference voltage range to produce a difference output signal. This difference output signal is summed with the selected voltage in the reference voltage range and applied to the non-inverting input of the differential amplifier to produce a clamp voltage with substantially minimum offsets due to the amplifier, ADC and DAC.
    Type: Grant
    Filed: October 31, 1991
    Date of Patent: December 6, 1994
    Assignees: North American Philips Corporation, Texas Instruments Inc.
    Inventors: Steven C. Brummette, William G. Miller, James F. Asbury, William R. Krenik, Norman L. Culp
  • Patent number: 5371517
    Abstract: A color palette selects a master clock from plural clock signals received at clock input terminals in response to a master clock selection control word received at control data terminals. A circuit forms a plurality of divided down clock signals from selected divide ratios of the master clock. A circuit selects a shift clock from among the divided down clock signals in response to at least some bits of an output clock selection control word received at the control data terminals. A circuit selectively enables and disables the shift clock in response to blanking data. A circuit selects a video clock from among the divided down clock signals in response to at least some bits of the output clock selection control word. A circuit synchronizes multiple bit words of color code received at color code input terminals with the master clock. A circuit outputs at least one memory recall address in response to receiving each multiple bit word of color code.
    Type: Grant
    Filed: November 8, 1991
    Date of Patent: December 6, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Louis Izzi, William R. Krenik, Henry T. Yung, Chenwei J. Yin, Carrell R. Killebrew, Jr., Karl Guttag, Jerry R. Van Aken, Jeffrey Nye, Richard Simpson, Mike Asal