Patents by Inventor Woo-Geun Lee

Woo-Geun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9520419
    Abstract: A method of manufacturing a thin film transistor (TFT) array substrate includes forming a gate line and a gate electrode on a substrate, forming a gate-insulating layer and an oxide semiconductor layer on the gate line and the gate electrode, forming etch stop patterns at a thin-film transistor area and an area where the gate line and the data line overlap each other, forming a data conductor on the oxide semiconductor layer and the etch stop patterns, the data conductor comprising a source electrode and a drain electrode that constitute a TFT together with the gate electrode, and forming a data line extending in a direction intersecting the gate line.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: December 13, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Woo-Geun Lee, Ki-Won Kim, Hyun-Jung Lee, Ji-Soo Oh
  • Patent number: 9502445
    Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: November 22, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Je-Hun Lee, Ki-Won Kim, Do-Hyun Kim, Woo-Geun Lee, Kap-Soo Yoon
  • Patent number: 9443877
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: September 13, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Pil-Sang Yun, Ki-Won Kim, Hye-Young Ryu, Woo-Geun Lee, Seung-Ha Choi, Jae-Hyoung Youn, Kyoung-Jae Chung, Young-Wook Lee, Je-Hun Lee, Kap-Soo Yoon, Do-Hyun Kim, Dong-Ju Yang, Young-Joo Choi
  • Patent number: 9418861
    Abstract: Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: August 16, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung-Ha Choi, Kyoung-Jae Chung, Woo-Geun Lee
  • Patent number: 9281322
    Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: March 8, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung-Ho Jung, Young Joo Choi, Joon Geol Kim, Kang Moon Jo, Sho Yeon Kim, Byung Hwan Chu, Woo Geun Lee, Woo-Seok Jeon
  • Publication number: 20160027805
    Abstract: A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.
    Type: Application
    Filed: October 5, 2015
    Publication date: January 28, 2016
    Inventors: Hye Young RYU, Hee Jun BYEON, Woo Geun LEE, Kap Soo YOON, Yoon Ho KIM, Chun Won BYUN
  • Publication number: 20150340507
    Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
    Type: Application
    Filed: July 27, 2015
    Publication date: November 26, 2015
    Inventors: Je-Hun LEE, Ki-Won KIM, Do-Hyun KIM, Woo-Geun LEE, Kap-Soo YOON
  • Patent number: 9184090
    Abstract: A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: November 10, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung-Ha Choi, Kyoung-Jae Chung, Woo-Geun Lee
  • Publication number: 20150318312
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Application
    Filed: July 14, 2015
    Publication date: November 5, 2015
    Inventors: Pil-Sang Yun, Ki-Won Kim, Hye-Young Ryu, Woo-Geun Lee, Seung-Ha Choi, Jae-Hyoung Youn, Kyoung-Jae Chung, Young-Wook Lee, Je-Hun Lee, Kap-Soo Yoon, Do-Hyun Kim, Dong-Ju Yang, Young-Joo Choi
  • Publication number: 20150318317
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Application
    Filed: July 13, 2015
    Publication date: November 5, 2015
    Inventors: Pil-Sang YUN, Ki-Won KIM, Hye-Young RYU, Woo-Geun LEE, Seung-Ha CHOI, Jae-Hyoung YOUN, Kyoung-Jae CHUNG, Young-Wook LEE, Je-Hun LEE, Kap-Soo YOON, Do-Hyun KIM, Dong-Ju YANG, Young-Joo CHOI
  • Patent number: 9178024
    Abstract: A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: November 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ki-Won Kim, Kap Soo Yoon, Woo Geun Lee, Jin-Won Lee, Se-Myung Kwon, Jung Ouck Ahn, Si Jin Kim
  • Publication number: 20150311230
    Abstract: A method of manufacturing a thin film transistor (TFT) array substrate includes forming a gate line and a gate electrode on a substrate, forming a gate-insulating layer and an oxide semiconductor layer on the gate line and the gate electrode, forming etch stop patterns at a thin-film transistor area and an area where the gate line and the data line overlap each other, forming a data conductor on the oxide semiconductor layer and the etch stop patterns, the data conductor comprising a source electrode and a drain electrode that constitute a TFT together with the gate electrode, and forming a data line extending in a direction intersecting the gate line.
    Type: Application
    Filed: July 7, 2015
    Publication date: October 29, 2015
    Inventors: Young-Wook LEE, Woo-Geun LEE, Ki-Won KIM, Hyun-Jung LEE, Ji-Soo OH
  • Publication number: 20150287836
    Abstract: A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 8, 2015
    Inventors: Hyun-Jung Lee, Sung-Haeng Cho, Woo-Geun Lee, Jang-Hoon Ha, Hee-Jun Byeon, Ji-Yun Hong, Ji-Soo Oh
  • Patent number: 9153600
    Abstract: A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: October 6, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hye Young Ryu, Hee Jun Byeon, Woo Geun Lee, Kap Soo Yoon, Yoon Ho Kim, Chun Won Byun
  • Patent number: 9123597
    Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: September 1, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Je-Hun Lee, Ki-Won Kim, Do-Hyun Kim, Woo-Geun Lee, Kap-Soo Yoon
  • Patent number: 9117917
    Abstract: A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: August 25, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyun-Jung Lee, Sung-Haeng Cho, Woo-Geun Lee, Jang-Hoon Ha, Hee-Jun Byeon, Ji-Yun Hong, Ji-Soo Oh
  • Patent number: 9111805
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: August 18, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Pil-Sang Yun, Ki-Won Kim, Hye-Young Ryu, Woo-Geun Lee, Seung-Ha Choi, Jae-Hyoung Youn, Kyoung-Jae Chung, Young-Wook Lee, Je-Hun Lee, Kap-Soo Yoon, Do-Hyun Kim, Dong-Ju Yang, Young-Joo Choi
  • Patent number: 9105733
    Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: August 11, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Woo-Geun Lee, Ki-Won Kim, Hyun-Jung Lee, Ji-Soo Oh
  • Publication number: 20150187813
    Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.
    Type: Application
    Filed: March 16, 2015
    Publication date: July 2, 2015
    Inventors: Seung-Ho JUNG, Young Joo CHOI, Joon Geol KIM, Kang Moon JO, Sho Yeon KIM, Byung Hwan CHU, Woo Geun LEE, Woo-Seok JEON
  • Patent number: 9012994
    Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: April 21, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung-Ho Jung, Young Joo Choi, Joon Geol Kim, Kang Moon Jo, Sho Yeon Kim, Byung Hwan Chu, Woo Geun Lee, Woo-Seok Jeon