Patents by Inventor Woo-Geun Lee

Woo-Geun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8624238
    Abstract: A thin-film transistor (TFT) substrate having reduced defects is fabricated using a reduced number of masks. The TFT substrate includes gate wiring formed on a substrate. The gate wiring includes a gate electrode. A semiconductor pattern is formed on the gate wiring. An etch-stop pattern is formed on the semiconductor pattern. Data wiring includes a source electrode which is formed on the semiconductor pattern and the etch-stop pattern. Each of the gate wiring and the data wiring includes a copper-containing layer and a buffer layer formed on or under the copper-containing layer.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: January 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-In Kim, Young-Wook Lee, Jean-Ho Song, Jae-Hyoung Yoon, Sung-Ryul Kim, Byeong-Beom Kim, Je-Hyeong Park, Woo-Geun Lee
  • Patent number: 8604469
    Abstract: A thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode, a gate insulating layer formed on the gate line, a semiconductor formed on the gate insulating layer and including a channel of a thin film transistor, a data line formed on the semiconductor and including a source electrode and a drain electrode formed on the semiconductor and opposite to the source electrode with respect to the channel of the thin film transistor, wherein the channel of the thin film transistor covers both side surfaces of the gate electrode.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: December 10, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Woo-Geun Lee, Jae-Hyoung Youn, Ki-Won Kim, Young-Wook Lee, Jong-In Kim
  • Patent number: 8598577
    Abstract: A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: December 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Woo Park, Dong-Hoon Lee, Sung-Haeng Cho, Woo-Geun Lee, Hye-Young Ryu, Young-Joo Choi
  • Patent number: 8598583
    Abstract: A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: December 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hye-Young Ryu, Jin-Won Lee, Woo-Geun Lee, Hee-Jun Byeon, Xun Zhu
  • Publication number: 20130295718
    Abstract: An oxide thin-film transistor (TFT) substrate that includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.
    Type: Application
    Filed: July 1, 2013
    Publication date: November 7, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Pil-Sang YUN, Young-Wook Lee, Woo-Geun Lee
  • Patent number: 8563368
    Abstract: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: October 22, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Hong-Suk Yoo, Jean-Ho Song, Jae-Hyoung Youn, Woo-Geun Lee, Ki-Won Kim, Jong-In Kim
  • Publication number: 20130248866
    Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.
    Type: Application
    Filed: May 20, 2013
    Publication date: September 26, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Young-Wook LEE, Woo-Geun Lee, Ki-Won Kim, Hyun-Jung Lee, Ji-Soo Oh
  • Publication number: 20130234124
    Abstract: Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.
    Type: Application
    Filed: April 26, 2013
    Publication date: September 12, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: KAP-SOO YOON, Woo-Geun Lee, Bong-Kyun Kim, Sung-Hoon Yang, Ki-Won Kim, Hyun-Jung Lee
  • Publication number: 20130214299
    Abstract: A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.
    Type: Application
    Filed: September 14, 2012
    Publication date: August 22, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hye Young RYU, Hee Jun BYEON, Woo Geun LEE, Kap Soo YOON, Yoon Ho KIM, Chun Won BYUN
  • Patent number: 8476627
    Abstract: Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: July 2, 2013
    Inventors: Pil-Sang Yun, Young-Wook Lee, Woo-Geun Lee
  • Publication number: 20130146864
    Abstract: A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.
    Type: Application
    Filed: May 4, 2012
    Publication date: June 13, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ki-Won KIM, Kap Soo YOON, Woo Geun LEE, Jin-Won LEE, Se-Myung KWON, Jung Ouck AHN, Si Jin KIM
  • Patent number: 8461585
    Abstract: A display substrate includes; a gate pattern including a gate electrode disposed on a substrate, a gate insulation layer disposed on the substrate and the gate pattern, an insulation pattern including; a first thickness part disposed on a first area of the gate insulation layer overlapping the gate electrode and a second thickness part disposed on a second area of the gate insulation layer adjacent to the first area, an oxide semiconductor pattern disposed on the first thickness part of the first area, an etch stopper disposed on the oxide semiconductor pattern, a source pattern including a source electrode and a drain electrode which contact the oxide semiconductor pattern, and a pixel electrode which contacts the drain electrode.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: June 11, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Joo Choi, Woo-Geun Lee, Do-Hyun Kim
  • Patent number: 8450736
    Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: May 28, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Woo-Geun Lee, Ki-Won Kim, Hyun-Jung Lee, Ji-Soo Oh
  • Patent number: 8445301
    Abstract: Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: May 21, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kap-Soo Yoon, Woo-Geun Lee, Bong-Kyun Kim, Sung-Hoon Yang, Ki-Won Kim, Hyun-Jung Lee
  • Publication number: 20130099240
    Abstract: A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.
    Type: Application
    Filed: October 12, 2012
    Publication date: April 25, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Hyun-Jung LEE, Sung-Haeng CHO, Woo-Geun LEE, Jang-Hoon HA, Hee-Jun BYEON, Ji-Yun HONG, Ji-Soo OH
  • Patent number: 8389998
    Abstract: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: March 5, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Hong-Suk Yoo, Jean-Ho Song, Jae-Hyoung Youn, Woo-Geun Lee, Ki-Won Kim, Jong-In Kim
  • Publication number: 20130009151
    Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 10, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Je-Hun LEE, Ki-Won KIM, Do-Hyun KIM, Woo-Geun LEE, Kap-Soo YOON
  • Patent number: 8313988
    Abstract: A thin film transistor substrate includes a base substrate, a gate electrode, a gate insulating layer, a surface treating layer, an active layer, a source electrode and a drain electrode. The gate electrode is formed on the base substrate. The gate insulating layer is formed on the base substrate to cover the gate electrode. The surface treating layer is formed on the gate insulating layer by treating the gate insulating layer with a nitrogen-containing gas to prevent leakage current. The active layer is formed on the surface treating layer to cover the gate electrode. The source electrode and the gate electrode that are spaced apart from each other by a predetermined distance are formed on the active layer.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: November 20, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Woo Whangbo, Shi-Yul Kim, Sung-Hoon Yang, Woo-Geun Lee
  • Publication number: 20120286259
    Abstract: Exemplary embodiments of the present invention provide a display substrate including a gate electrode, an oxide semiconductor pattern, a source electrode, a drain electrode, and an etch stop pattern. The gate electrode may be disposed on a base substrate. The oxide semiconductor pattern may be disposed over the gate electrode. The source electrode may be disposed on the oxide semiconductor pattern. The drain electrode may be disposed on the oxide semiconductor pattern and spaced apart from the source electrode. The etch stop pattern may be disposed over the gate electrode, the etch stop pattern may be overlapping a space between the source electrode and the drain electrode and may include a metal oxide. The reliability of the display substrate may, therefore, be improved.
    Type: Application
    Filed: March 27, 2012
    Publication date: November 15, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Woo PARK, Dong-Hoon LEE, Sung-Haeng CHO, Woo-Geun LEE, Kap-Soo YOON
  • Patent number: 8288766
    Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: October 16, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Je-Hun Lee, Ki-Won Kim, Do-Hyun Kim, Woo-Geun Lee, Kap-Soo Yoon