Abstract: A power supply apparatus may include a power management circuits, a switch circuit and a power controller. The power controller configured to sequentially drive the power management circuits in accordance with a drive sequence, and control the switch circuit to apply, to the output terminals, the output voltage of a normally operated power management circuit as the driven power management circuit among the power management circuits.

Abstract: A memory system includes a memory device including a first memory block used for power-loss data protection and a controller coupled to the memory device. The controller includes a hardware layer and a firmware layer. The hardware layer checks whether at least one write data entry belongs to a programmable range in the memory device after power loss occurs, determines whether a logical address associated with the at least one write data entry is repeated, and programs the at least one write data entry in the first memory block.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method for operating the same. An operation of writing metadata in multiple memory dies in the memory device is started, and an erase operation is then performed, when the request for the erase operation exists, with regard to some of the multiple memory dies. Accordingly, the time taken to write metadata can be uniformly adjusted to the largest extent, and the magnitude of peak power consumed by the memory device can be minimized.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method for operating the same. An operation of writing metadata in multiple memory dies in the memory device is started, and an erase operation is then performed, when the request for the erase operation exists, with regard to some of the multiple memory dies. Accordingly, the time taken to write metadata can be uniformly adjusted to the largest extent, and the magnitude of peak power consumed by the memory device can be minimized.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method for operating the same. An operation of writing metadata in multiple memory dies in the memory device is started, and an erase operation is then performed, when the request for the erase operation exists, with regard to some of the multiple memory dies. Accordingly, the time taken to write metadata can be uniformly adjusted to the largest extent, and the magnitude of peak power consumed by the memory device can be minimized.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method for operating the same. An operation of writing metadata in multiple memory dies in the memory device is started, and an erase operation is then performed, when the request for the erase operation exists, with regard to some of the multiple memory dies. Accordingly, the time taken to write metadata can be uniformly adjusted to the largest extent, and the magnitude of peak power consumed by the memory device can be minimized.

Abstract: A memory system, a memory device, a memory controller and an operating method thereof. By issuing a first status check signal when a first delay time elapses since a first point in time at which a program operation for first memory cells corresponding to a first word line is started and by issuing a second status check signal when a second delay time different from the first delay time elapses since a second point in time at which a program operation for second memory cells corresponding to a second word line is started, it is possible to efficiently perform a status check operation related with a program operation of data.

Abstract: A memory system, a memory device, a memory controller and an operating method thereof. By issuing a first status check signal when a first delay time elapses since a first point in time at which a program operation for first memory cells corresponding to a first word line is started and by issuing a second status check signal when a second delay time different from the first delay time elapses since a second point in time at which a program operation for second memory cells corresponding to a second word line is started, it is possible to efficiently perform a status check operation related with a program operation of data.

Abstract: A method for operating a data storage device includes determining an nth garbage collection throughput by multiplying a rate of a number of used pages of an open memory block to an amount of write data to be processed to a sum of the number of used empty memory blocks and an immediately previous garbage collection throughput average value; and performing a garbage collection operation based on the nth garbage collection throughput.

Abstract: A memory system includes a memory device including a plurality of memory arrays, each of which includes a plurality of memory blocks, and a controller suitable for setting super blocks each including respective memory blocks that belong to two or more memory arrays among the plurality of the memory arrays and performing a garbage collection operation on the super blocks based on a valid page information and a wearing level of each super block.

Abstract: A method for operating a data storage device includes determining an nth garbage collection throughput by multiplying a rate of a number of used pages of an open memory block to an amount of write data to be processed to a sum of the number of used empty memory blocks and an immediately previous garbage collection throughput average value; and performing a garbage collection operation based on the nth garbage collection throughput.

Abstract: A memory system includes a memory device including a plurality of memory arrays, each of which includes a plurality of memory blocks, and a controller suitable for setting super blocks each including respective memory blocks that belong to two or more memory arrays among the plurality of the memory arrays and performing a garbage collection operation on the super blocks based on a valid page information and a wearing level of each super block.

Abstract: A bottle for carbonated beverages is disclosed. The bottle almost completely prevents the dissolved carbonic dioxide from vaporizing and vanishing into carbonic acid gas when drinking the carbonated beverage sparingly, thus maintaining the cool and fresh taste of the carbonated beverage for a lengthy period of time. A bellows is formed on the bottle body and may be compressed by at least two strip fasteners, thus reducing the volume of the bottle. In order to couple the fasteners to the bottle, the bottle has at least two lock slits with respective elastic pawls and at least two passing slits with respective stop depressions. The lock slits may be formed on the neck flange of the bottle, while the passing slits may be formed on the bottle stand. Alternatively, the positions of the lock slits and the passing slits may be changed with each other.