Patents by Inventor Xia Li

Xia Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11548422
    Abstract: The invention relates to a self-reset adjusting mechanism, including: a mounting base; an adjusting member rotatably mounted on the mounting base; a first reset member mounted between the adjusting member and the mounting base; a limiting member rotatably mounted on the mounting base, the limiting member being provided with, corresponding to the adjusting member, a plurality of clamping tables at different heights, and the position of the adjusting member being adjusted by clamping the adjusting member on the clamping tables corresponding to the limiting member; and a second reset member mounted between the limiting member and the mounting base, when the limiting member is rotated to the limit position, the second reset member being deformed to produce an acting force in a direction the same as the rotation direction of the limiting member to cause the limiting member to be in the limit position, and in this case, the first reset member resetting the adjusting member and exerting a reset acting force on the l
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: January 10, 2023
    Assignee: YANFENG ADIENT SEATING CO. LTD.
    Inventors: Yaowei Cao, Donghai Xu, Xia Li, Min Zhu
  • Patent number: 11545483
    Abstract: Certain aspects of the present disclosure are directed to a semiconductor device. The semiconductor device generally includes a substrate, at least one silicon-on-insulator (SOI) transistor disposed above the substrate, a gate-all-around (GAA) transistor disposed above the substrate, and a fin field-effect transistor (FinFET) disposed above the substrate.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: January 3, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Xia Li, Haining Yang, Bin Yang
  • Patent number: 11544900
    Abstract: According to some embodiments, a system, method and non-transitory computer-readable medium are provided comprising a 3D building modeling module; a memory for storing program instructions; a 3D building modeling processor, coupled to the memory, and in communication with the 3D building modeling module and operative to execute program instructions to: receive a region of interest; receive an image of the region of image from a data source; generate a surface model based on the received image including one or more buildings; generate a digital height model; decompose each building into a set of shapes; apply a correction process to the set of shapes; execute a primitive classification process to each shape; execute a fitting process to each classified shape; select a best fitting model; and generate a 3D model of each building. Numerous other aspects are provided.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: January 3, 2023
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Yen-Liang Lin, Xia Li, James Vradenburg Miller, Walter V Dixon, III
  • Patent number: 11545404
    Abstract: Before a semiconductor die of a brittle III-V compound semiconductor is encapsulated with a molding compound during package fabrication, side surfaces of the semiconductor die are treated to avoid or prevent surface imperfections from propagating and fracturing the crystal structure of the substrate of the III-V compound semiconductor under the stresses applied as the molding compound solidifies. Surfaces are treated to form a passivation layer, which may be a passivated layer of the substrate or a passivation material on the substrate. In a passivated layer, imperfections of an external layer are transformed to be less susceptible to fracture. Passivation material, such as a poly-crystalline layer on the substrate surface, diffuses stresses that are applied by the molding compound. Semiconductor dies in flip-chip and wire-bond chip packages with treated side surfaces as disclosed have a reduced incidence of failure caused by die fracturing.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: January 3, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Gengming Tao, Bin Yang, Xia Li
  • Publication number: 20220401459
    Abstract: Provided is a new application of a chemokine receptor CCR6 inhibitor in preventing the recurrence of psoriasis. Specifically, provided is a use of the chemokine receptor CCR6 inhibitor for preparing a preparation or composition that is administered to a subject so as to prevent the recurrence of psoriasis in the subject. Also provided is a pharmaceutical product that prevents the recurrence of psoriasis. Using the provided drug products may effectively prevent or alleviate the recurrence of psoriasis.
    Type: Application
    Filed: June 12, 2020
    Publication date: December 22, 2022
    Inventors: Jie ZHENG, Na LIU, Hui QIN, Xia LI, Feng XUE, Lihong CHEN, Lanqi WANG, Sheng QUAN, Li ZHANG
  • Patent number: 11533045
    Abstract: In certain aspects, a duty-cycle monitor includes a first oscillator, and a flop having a signal input, a clock input, and an output, wherein the signal input is coupled to an input of the duty-cycle monitor, and the clock input is coupled to the first oscillator. The duty-cycle monitor also includes a first counter having a count input, an enable input, and a count output, wherein the count input of the first counter is coupled to the first oscillator, and the enable input of the first counter is coupled to the output of the flop. The duty-cycle monitor also includes a second counter having a count input, an enable input, and a count output, wherein the count input of the second counter is coupled to the first oscillator, and the enable input of the second counter is coupled to the output of the flop.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: December 20, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Xia Li, Min Chen, Jianguo Yao, Bin Yang
  • Patent number: 11518688
    Abstract: All inorganic perovskites for short-wave IR (SWIR) devices having improved chemical stability and long-term stability. Improved methods of making all inorganic perovskites for short-wave IR (SWIR) devices are also disclosed herein.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: December 6, 2022
    Assignees: HONDA MOTOR CO., LTD., UTAH STATE UNIVERSITY
    Inventors: Gugang Chen, Yi Rao, Xia Li
  • Patent number: 11515406
    Abstract: Aspects generally relate to a heterojunction bipolar transistor (HBT), and method of manufacturing the same. The HBT including an emitter a first, a first side of a base coupled to a second side of the emitter opposite the first side of the emitter. A collector coupled to the base on a second side of the base opposite the emitter, wherein an area of a junction between the base and the collector is less than or equal to an area of a junction between the base and the emitter. A dielectric coupled to the collector. A first conductive base contact coupled to the base and adjacent to the collector and extending over a base-collector junction, the conductive base contact operative as a field plate.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: November 29, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Gengming Tao, Bin Yang, Xia Li
  • Patent number: 11508277
    Abstract: An electronic device includes a display screen, where the display screen includes a first display region and a second display region, and a display driving system including a first emission (EM) signal output end configured to send a first EM signal to the display screen, where the display driving system further includes a second EM signal output end configured to send a second EM signal to the display screen, where the first EM signal controls the first display region to display an image in a first time period, and the second EM signal controls the second display region not to display an image in the first time period.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: November 22, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Dustin Yuk Lun Wai, Chun Yen Liu, Chiaching Chu, Xia Li
  • Publication number: 20220366838
    Abstract: A local active matrix display panel, circuits and methods of operation are described. In an embodiment, a local active matrix display panel includes an array of pixel driver chip, a thin film transistor layer in electrical contact with the array of pixel driver chips, and an array of light emitting diodes electrically connected with the thin film transistor layer.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 17, 2022
    Inventors: Hjalmar Edzer Ayco Huitema, Thomas Charisoulis, Xia Li
  • Publication number: 20220368181
    Abstract: A single-phase permanent magnet synchronous motor and dust collector. The single-phase permanent magnet synchronous motor includes a plurality of stator teeth, the plurality of stator teeth include at least: a first-type and second-type stator tooth; the first-type and second-type stator teeth enclose an annular working cavity for accommodating a rotor part, where the size of a central angle corresponding to a first contour line of an end face of the first-type stator tooth facing the rotor part is different from the size of a central angle corresponding to a second contour line of an end face of the second-type stator tooth facing the rotor part The motor has a significantly reduced cogging torque, a greatly reduced torque ripple, and an obviously increased motor output torque. The single-phase permanent magnet synchronous motor is small in size, light in weight, simple in structure, convenient for large-scale manufacture and low in manufacturing cost.
    Type: Application
    Filed: August 25, 2020
    Publication date: November 17, 2022
    Inventors: Yusheng Hu, Bin Chen, Yong Xiao, Zhidong Zhang, Jinfei Shi, Shengyu Xiao, Xia Li, Lin Tang, Shaoxuan Zhu, Pengqian Gui, Hui Sun, Jiating Ding
  • Patent number: 11500960
    Abstract: Certain aspects provide a circuit for in-memory computation. The circuit generally includes an in-memory computation array having a plurality of computation circuits, each of the computation circuits being configured to perform a dot product computation. In certain aspects, each of the computation circuits includes a memory cell, a capacitive element, a precharge transistor coupled between an output of the memory cell and the capacitive element, and a read transistor coupled between a read bit line (RBL) and the capacitive element.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: November 15, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Zhongze Wang, Ye Lu, Yandong Gao, Xiaochun Zhu, Xia Li
  • Publication number: 20220358537
    Abstract: Systems, devices, methods, and computer readable medium for evaluating visual quality of digital content are disclosed. Methods can include identifying content assets including one or more images that are combined to create different digital components distributed to one or more client devices. A quality of each of the one or more images is evaluated using one or more machine learning models trained to evaluate one or more visual aspects that are deemed indicative of visual quality. An aggregate quality for the content assets is determined based, at least in part, on an output of the one or more machine learning models indicating the visual quality of each of the one or more images. A graphical user interface of a first computing device is updated to present a visual indication of the aggregate quality of the content assets.
    Type: Application
    Filed: August 6, 2020
    Publication date: November 10, 2022
    Inventors: Catherine Shyu, Luying Li, Feng Yang, Junjie Ke, Xiyang Luo, Hao Feng, Chao-Hung Chen, Wenjing Kang, Zheng Xia, Shun-Chuan Chen, Yicong Tian, Xia Li, Han Ke
  • Publication number: 20220359611
    Abstract: Disclosed are examples of multiple bit magnetoresistive random access memory (MRAM) cells. A multiple bit MRAM cell may comprise a fixed layer, alternately stacked N tunnel barriers and N free layers, and a tunnel cap. N, which may represent number of bits of the MRAM cell, may be greater than or equal to two. Magnetic moment of the fixed layer may be fixed in one perpendicular direction. Magnetic moments of the free layers may be switchable from one to other perpendicular directions upon application of switch currents. The switch currents may be different for different layers. The magnetic moments of the free layers may be switched separately or otherwise independently of other free layers when the switch currents are applied separately.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 10, 2022
    Inventors: Xia LI, Bin YANG
  • Patent number: 11494629
    Abstract: Certain aspects provide a circuit for in-memory computation. The circuit generally includes a first memory cell, and a first computation circuit. The first computation circuit may include a first switch having a control input coupled to an output of the first memory cell, a second switch coupled between a node of the first computation circuit and the first switch, a control input of the second switch being coupled to a discharge word-line (DCWL), a capacitive element coupled between the node and a reference potential node, a third switch coupled between the node and a read bit-line (RBL), and a fourth switch coupled between the node and an activation (ACT) line.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: November 8, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Zhongze Wang, Xia Li, Xiaochun Zhu
  • Patent number: 11477678
    Abstract: A device may receive input data associated with a wireless network, and may extract data from the input data to generate extracted data. The device may create PRB images based on the extracted data, and may process the PRB images, with a first model, to associate labels with each of the PRB images. The device may process the labels and the PRB images, with a second model, to identify potential issues associated with the PRB images, and may process data identifying the potential issues associated with the PRB images, with a third model, to compress the data identifying the potential issues into an array. The device may process the array, with a fourth model, to determine probability scores associated with the potential issues, and may select a potential issue with a greatest probability score as a detected issue. The device may perform actions based on the detected issue.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: October 18, 2022
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Christian Winter, Brian A. Ward, Richard S. Delk, Xia Li
  • Patent number: 11474786
    Abstract: Certain aspects provide methods and apparatus for multiplication of digital signals. In accordance with certain aspects, a multiplication circuit may be used to multiply a portion of a first digital input signal with a portion of a second digital input signal via a first multiplier circuit to generate a first multiplication signal, and multiply another portion of the first digital input signal with another portion of the second digital input signal via a second multiplier circuit to generate a second multiplication signal. A third multiplier circuit and multiple adder circuits may be used to generate an output of the multiplication circuit based on the first and second multiplication signals.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: October 18, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Xia Li, Zhongze Wang, Periannan Chidambaram
  • Patent number: 11476962
    Abstract: The present application discloses a method for determining time information, including: detecting a signal of a periodic block, and recording a timestamp of the periodic block; and determining a time at which a time information message to be sent according to the timestamp of the periodic block matched with the time information message, and generating a timestamp of the time information message. The present application further discloses an apparatus and device for determining time information, and a storage medium.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: October 18, 2022
    Assignee: ZTE CORPORATION
    Inventors: Li He, Xia Li
  • Publication number: 20220328237
    Abstract: Disclosed is apparatus including a vertical spiral inductor. The vertical spiral inductor may include a plurality of dielectric layers formed on a substrate, a plurality of conductive layers, each of the plurality of conductive layers disposed on each of the plurality of dielectric layers, a plurality of insulating layers, each of the plurality of insulating layers disposed on each of the plurality of conductive layers, wherein each of the plurality of insulating layers separates each of the plurality of dielectric layers. A first spiral coil is arranged in a first plane perpendicular to the substrate, where the first spiral coil is formed of first portions of the plurality of conductive layers and a first set of vias of a plurality of vias, configured to connect the first portions of the plurality of conductive layers.
    Type: Application
    Filed: April 9, 2021
    Publication date: October 13, 2022
    Inventors: Xia LI, Bin YANG, Haining YANG
  • Publication number: 20220301141
    Abstract: Systems, devices, methods, and computer readable medium for evaluating visual quality of digital content are disclosed. Methods can include training machine learning models on images. A request is received to evaluate quality of an image included in a current version of a digital component generated by the computing device. The machine learning models are deployed on the image to generate a score for each quality characteristic of the image. A weight is assigned to each score to generate weighted scores. The weighted scores are combined to generate a combined score for the image. The combined score is compared to one or more thresholds to generate a quality of the image.
    Type: Application
    Filed: August 6, 2020
    Publication date: September 22, 2022
    Inventors: Catherine Shyu, Xiyang Luo, Feng Yang, Junjie Ke, Yicong Tian, Chao-Hung Chen, Xia Li, Luying Li, Wenjing Kang, Shun-Chuan Chen