Patents by Inventor Xiangjing Zhuo

Xiangjing Zhuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11328924
    Abstract: Provided is a method for manufacturing a semiconductor wafer and a semiconductor wafer. The method includes: disposing a sacrificial layer on a first surface and a second surface of a patterned substrate, the patterned substrate comprising the first surface and the second surface having different normal directions; exposing the first surface by removing the first portion of the sacrificial layer disposed on the first surface; growing an original nitride buffer layer on the first surface and the second portion of the sacrificial layer; partially lifting off the second portion of the sacrificial layer disposed on the second surface such that at least one sub-portion of the second portion of the sacrificial layer remains on the second surface of the patterned substrate; and growing an epitaxial layer on the original nitride buffer layer, where a crystal surface of the epitaxial layer grows along a normal direction of the patterned substrate.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: May 10, 2022
    Assignee: Xiamen Changelight Co., Ltd.
    Inventors: Kaixuan Chen, Zhiwei Lin, Liyan Huo, Xiangjing Zhuo, Gang Yao, Aimin Wang
  • Patent number: 11201260
    Abstract: A semiconductor chip of a light emitting diode includes a substrate, and an N-type gallium nitride layer, a quantum well layer, and a P-type gallium nitride layer stacked on the substrate successively, an N-type electrode electrically connected to the N-type gallium nitride layer, and a P-type electrode electrically connected to the P-type gallium nitride layer. The quantum well layer includes at least one quantum barrier and at least one quantum well stacked successively in sequence, wherein the growth pressure of the quantum barrier and the growth pressure of the quantum well are different, such that the interface crystal quality between the quantum well and the quantum barrier of the quantum well layer can be greatly improved to enhance the luminous efficiency of the semiconductor chip.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: December 14, 2021
    Assignee: XIAMEN CHANGELIGHT CO., LTD.
    Inventors: Zhi Wan, Gang Yao, Xiangjing Zhuo, Zhiwei Lin
  • Patent number: 10937926
    Abstract: A semiconductor wafer includes a substrate (1), a buffer layer (2) deposited on the substrate (1), and an epitaxial layer (4) above the buffer layer (2). The buffer layer (2) includes a plurality of semiconductor material layers (22) and a plurality of oxygen-doped material layers (21). The semiconductor material layers (22) and the oxygen-doped material layers (21) are deposited in an alternating arrangement on top of each other. Oxygen concentrations of the oxygen-doped material layers (21) gradually decrease along a direction from the substrate (1) to the epitaxial layer (4).
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: March 2, 2021
    Assignee: Xiamen Changelight Co., Ltd.
    Inventors: Zhiwei Lin, Kaixuan Chen, Yong Zhang, Xiangjing Zhuo, Wei Jiang, Yang Wang, Jichu Tong, Tianzu Fang
  • Patent number: 10916422
    Abstract: Disclosed is a wafer or a material stack for semiconductor-based optoelectronic or electronic devices that minimizes or reduces misfit dislocation, as well as a method of manufacturing such wafer of material stack. A material stack according to the disclosed technology includes a substrate; a basis buffer layer of a first material disposed above the substrate; and a plurality of composite buffer layers disposed above the basis buffer layer sequentially along a growth direction. The growth direction is from the substrate to a last composite buffer layer of the plurality of composite buffer layers. Each composite buffer layer except the last composite buffer layer includes a first buffer sublayer of the first material, and a second buffer sublayer of a second material disposed above the first buffer sublayer. The thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: February 9, 2021
    Assignee: Xiamen Changelight Co., Ltd.
    Inventors: Kaixuan Chen, Wei Jiang, Zhiwei Lin, Xiangjing Zhuo, Tianzu Fang, Yang Wang, Jichu Tong
  • Publication number: 20200219715
    Abstract: Provided is a method for manufacturing a semiconductor wafer and a semiconductor wafer. The method includes: disposing a sacrificial layer on a first surface and a second surface of a patterned substrate, the patterned substrate comprising the first surface and the second surface having different normal directions; exposing the first surface by removing the first portion of the sacrificial layer disposed on the first surface; growing an original nitride buffer layer on the first surface and the second portion of the sacrificial layer; partially lifting off the second portion of the sacrificial layer disposed on the second surface such that at least one sub-portion of the second portion of the sacrificial layer remains on the second surface of the patterned substrate; and growing an epitaxial layer on the original nitride buffer layer, where a crystal surface of the epitaxial layer grows along a normal direction of the patterned substrate.
    Type: Application
    Filed: March 20, 2020
    Publication date: July 9, 2020
    Applicant: Xiamen Changelight Co. Ltd.
    Inventors: Kaixuan CHEN, Zhiwei LIN, Liyan HUO, Xiangjing ZHUO, Gang YAO, Aimin WANG
  • Patent number: 10622339
    Abstract: A micro-LED macro transfer method, a micro-LED display device, and a method for fabricating the same are provided. In the micro-LED macro transfer method, the LED chips on an array are divided into a first plurality of LED chips and a second plurality of LED chips. An LED chip includes a first surface and a second surface. The first plurality of LED chips are configured so that their first surfaces are coupled to the first transfer substrate. The second plurality of LED chips are configured so that their second surfaces are coupled to the second transfer substrate. Accordingly, the first transfer substrate transfers the first plurality of LED chips to the first transfer substrate while the second transfer substrate transfers the second plurality of LED chips to the second transfer substrate.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: April 14, 2020
    Assignee: Xiamen Changelight Co., Ltd.
    Inventors: Zhiwei Lin, Qunxiong Deng, Kaixuan Chen, Zhijie Ke, Xiangjing Zhuo
  • Publication number: 20200091374
    Abstract: A semiconductor chip of a light emitting diode includes a substrate, and an N-type gallium nitride layer, a quantum well layer, and a P-type gallium nitride layer stacked on the substrate successively, an N-type electrode electrically connected to the N-type gallium nitride layer, and a P-type electrode electrically connected to the P-type gallium nitride layer. The quantum well layer includes at least one quantum barrier and at least one quantum well stacked successively in sequence, wherein the growth pressure of the quantum barrier and the growth pressure of the quantum well are different, such that the interface crystal quality between the quantum well and the quantum barrier of the quantum well layer can be greatly improved to enhance the luminous efficiency of the semiconductor chip.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 19, 2020
    Inventors: Zhi WAN, Gang YAO, Xiangjing ZHUO, Zhiwei LIN
  • Publication number: 20200013760
    Abstract: A micro-LED macro transfer method, a micro-LED display device, and a method for fabricating the same are provided. In the micro-LED macro transfer method, the LED chips on an array are divided into a first plurality of LED chips and a second plurality of LED chips. An LED chip includes a first surface and a second surface. The first plurality of LED chips are configured so that their first surfaces are coupled to the first transfer substrate. The second plurality of LED chips are configured so that their second surfaces are coupled to the second transfer substrate. Accordingly, the first transfer substrate transfers the first plurality of LED chips to the first transfer substrate while the second transfer substrate transfers the second plurality of LED chips to the second transfer substrate.
    Type: Application
    Filed: August 31, 2018
    Publication date: January 9, 2020
    Applicant: Xiamen Changelight Co. Ltd.
    Inventors: Zhiwei LIN, Qunxiong DENG, Kaixuan CHEN, Zhijie KE, Xiangjing ZHUO
  • Patent number: 10468550
    Abstract: A light-emitting diode (LED) device and a method of producing the same are provided. The LED device comprises a first conductive layer, a second conductive layer, an active layer sandwiched between the first conductive layer and the second conductive layer and a first electrode in electrical contact with the first conductive layer. The first conductive layer has a laminate structure comprising a first conductive sub-layer, a current blocking layer, and a second conductive sub-layer. The first electrode comprises a first extended electrode in electrical contact with the first conductive sub-layer, and a second extended electrode in electrical contact with the second conductive sub-layer. The first conductive sub-layer and the second conductive sub-layer may have different depths.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: November 5, 2019
    Assignee: XIAMEN CHANGELIGHT CO., LTD.
    Inventors: Zhiwei Lin, Kaixuan Chen, Junxian Li, Xiangjing Zhuo, Qilong Wu
  • Publication number: 20190296189
    Abstract: A semiconductor wafer includes a substrate (1), a buffer layer (2) deposited on the substrate (1), and an epitaxial layer (4) above the buffer layer (2). The buffer layer (2) includes a plurality of semiconductor material layers (22) and a plurality of oxygen-doped material layers (21). The semiconductor material layers (22) and the oxygen-doped material layers (21) are deposited in an alternating arrangement on top of each other. Oxygen concentrations of the oxygen-doped material layers (21) gradually decrease along a direction from the substrate (1) to the epitaxial layer (4).
    Type: Application
    Filed: July 14, 2017
    Publication date: September 26, 2019
    Inventors: Zhiwei Lin, Kaixuan Chen, Yong Zhang, Xiangjing Zhuo, Wei Jiang, Yang Wang, Jichu Tong, Tianzu Fang
  • Publication number: 20190221709
    Abstract: A light-emitting diode (LED) device and a method of producing the same are provided. The LED device comprises a first conductive layer, a second conductive layer, an active layer sandwiched between the first conductive layer and the second conductive layer and a first electrode in electrical contact with the first conductive layer. The first conductive layer has a laminate structure comprising a first conductive sub-layer, a current blocking layer, and a second conductive sub-layer. The first electrode comprises a first extended electrode in electrical contact with the first conductive sub-layer, and a second extended electrode in electrical contact with the second conductive sub-layer. The first conductive sub-layer and the second conductive sub-layer may have different depths.
    Type: Application
    Filed: December 14, 2018
    Publication date: July 18, 2019
    Applicant: Xiamen Changelight Co. Ltd.
    Inventors: Zhiwei LIN, Kaixuan CHEN, Junxian LI, Xiangjing ZHUO, Qilong WU
  • Patent number: 10333028
    Abstract: According to at least some embodiments of the present disclosure, a light-emitting diode (LED) chip includes a semiconductor material portion, a transparent conductive layer disposed above the semiconductor material portion, a current blocking layer disposed above the transparent conductive layer, one or more electrodes disposed above the current blocking layer, and a plurality of electron outflow channels that electrically interconnect at least one electrode and the semiconductor material portion across the transparent conductive layer and the current blocking layer.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: June 25, 2019
    Assignee: XIAMEN CHANGELIGHT CO., LTD.
    Inventors: Liang Chen, Junxian Li, Qimeng Lv, Zhendong Wei, Yingce Liu, Xiaoping Li, Xinmao Huang, Kaixuan Chen, Yong Zhang, Zhiwei Lin, Wei Jiang, Xiangjing Zhuo, Tianzu Fang
  • Publication number: 20190103506
    Abstract: According to at least some embodiments of the present disclosure, a method of manufacturing semiconductor wafers comprises: selectively growing a nitride buffer layer on a first surface of a patterned substrate, the patterned substrate including at least the first surface and a second surface; and growing an epitaxial layer on the nitride buffer layer, wherein a crystal surface of the epitaxial layer grows along a normal direction of the patterned substrate. The epitaxial layer does not include multiple crystal surfaces having different crystal growth directions that cause a stress at a junction interface where the crystal surfaces having the different crystal growth directions meet.
    Type: Application
    Filed: July 31, 2018
    Publication date: April 4, 2019
    Inventors: Kaixuan Chen, Zhiwei Lin, Xiangjing Zhuo, Gang Jing, Aimin Wang
  • Publication number: 20190088476
    Abstract: Disclosed is a wafer or a material stack for semiconductor-based optoelectronic or electronic devices that minimizes or reduces misfit dislocation, as well as a method of manufacturing such wafer of material stack. A material stack according to the disclosed technology includes a substrate; a basis buffer layer of a first material disposed above the substrate; and a plurality of composite buffer layers disposed above the basis buffer layer sequentially along a growth direction. The growth direction is from the substrate to a last composite buffer layer of the plurality of composite buffer layers. Each composite buffer layer except the last composite buffer layer includes a first buffer sublayer of the first material, and a second buffer sublayer of a second material disposed above the first buffer sublayer. The thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction.
    Type: Application
    Filed: November 2, 2018
    Publication date: March 21, 2019
    Applicant: Xiamen Changelight Co., Ltd.
    Inventors: Kaixuan Chen, Wei Jiang, Zhiwei Lin, Xiangjing Zhuo, Tianzu Fang, Yang Wang, Jichu Tong
  • Patent number: 10121656
    Abstract: Disclosed is a wafer or a material stack for semiconductor-based optoelectronic or electronic devices that minimizes or reduces misfit dislocation, as well as a method of manufacturing such wafer of material stack. A material stack according to the disclosed technology includes a substrate; a basis buffer layer of a first material disposed above the substrate; and a plurality of composite buffer layers disposed above the basis buffer layer sequentially along a growth direction. The growth direction is from the substrate to a last composite buffer layer of the plurality of composite buffer layers. Each composite buffer layer except the last composite buffer layer includes a first buffer sublayer of the first material, and a second buffer sublayer of a second material disposed above the first buffer sublayer. The thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: November 6, 2018
    Assignee: Xiamen Changelight Co., Ltd.
    Inventors: Kaixuan Chen, Wei Jiang, Zhiwei Lin, Xiangjing Zhuo, Tianzu Fang, Yang Wang, Jichu Tong
  • Patent number: 10043850
    Abstract: An HV-LED module having 3D light-emitting structure and a method for manufacturing the HV-LED module are disclosed. The HV-LED module has at least two stacked parts of substage LEDs that each have an independent light-emitting structure and are bonded in a staggered pattern, and the substage LEDs are connected in series to form the 3D light-emitting structure, thereby significantly increasing light-emitting power per unit area, downsizing a high-voltage chip module using it by nearly two times, and effectively reducing packaging costs for the HV-LED module.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: August 7, 2018
    Assignee: Xiamen Changelight Co., Ltd.
    Inventors: Zhiwei Lin, Kaixuan Chen, Yong Zhang, Xiangjing Zhuo, Wei Jiang, Tianzu Fang, Yinqiao Zhang, Xiangwu Wang
  • Publication number: 20170294557
    Abstract: According to at least some embodiments of the present disclosure, a light-emitting diode (LED) chip includes a semiconductor material portion, a transparent conductive layer disposed above the semiconductor material portion, a current blocking layer disposed above the transparent conductive layer, one or more electrodes disposed above the current blocking layer, and a plurality of electron outflow channels that electrically interconnect at least one electrode and the semiconductor material portion across the transparent conductive layer and the current blocking layer.
    Type: Application
    Filed: April 7, 2017
    Publication date: October 12, 2017
    Inventors: Liang Chen, Junxian Li, Qimeng Lv, Zhendong Wei, Yingce Liu, Xiaoping Li, Xinmao Huang, Kaixuan Chen, Yong Zhang, Zhiwei Lin, Wei Jiang, Xiangjing Zhuo, Tianzu Fang
  • Publication number: 20170256404
    Abstract: Disclosed is a wafer or a material stack for semiconductor-based optoelectronic or electronic devices that minimizes or reduces misfit dislocation, as well as a method of manufacturing such wafer of material stack. A material stack according to the disclosed technology includes a substrate; a basis buffer layer of a first material disposed above the substrate; and a plurality of composite buffer layers disposed above the basis buffer layer sequentially along a growth direction. The growth direction is from the substrate to a last composite buffer layer of the plurality of composite buffer layers. Each composite buffer layer except the last composite buffer layer includes a first buffer sublayer of the first material, and a second buffer sublayer of a second material disposed above the first buffer sublayer. The thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction.
    Type: Application
    Filed: February 14, 2017
    Publication date: September 7, 2017
    Inventors: Kaixuan Chen, Wei Jiang, Zhiwei Lin, Xiangjing Zhuo, Tianzu Fang, Yang Wang, Jichu Tong
  • Publication number: 20170256403
    Abstract: Disclosed is a method of manufacturing a semiconductor-based wafer for reducing misfit dislocation. The method includes steps of depositing a basis buffer layer of aluminum nitride (AlN) on a substrate; forming an AlN sublayer of a composite buffer layer on the basis buffer layer by supplying pulses of reactants for AlN for a first total pulse time period; forming an gallium nitride (GaN) sublayer of the composite buffer layer on the AlN sublayer by supplying pulses of reactants for GaN for a second total pulse time period; and growing additional composite buffer layers along a growth direction from the substrate to the composite buffer layers, by repeating steps of forming the AlN sublayer and forming the GaN sublayer. The first total pulse time period for each AlN sublayer decreases among the composite buffer layers along the growth direction.
    Type: Application
    Filed: February 14, 2017
    Publication date: September 7, 2017
    Inventors: Kaixuan Chen, Wei Jiang, Zhiwei Lin, Xiangjing Zhuo, Tianzu Fang, Yang Wang, Jichu Tong
  • Publication number: 20160276402
    Abstract: An HV-LED module having 3D light-emitting structure and a method for manufacturing the HV-LED module are disclosed. The HV-LED module has at least two stacked parts of substage LEDs that each have an independent light-emitting structure and are bonded in a staggered pattern, and the substage LEDs are connected in series to form the 3D light-emitting structure, thereby significantly increasing light-emitting power per unit area, downsizing a high-voltage chip module using it by nearly two times, and effectively reducing packaging costs for the HV-LED module.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 22, 2016
    Inventors: Zhiwei Lin, Kaixuan Chen, Yong Zhang, Xiangjing Zhuo, Wei Jiang, Tianzu Fang, Yinqiao Zhang, Xiangwu Wang