Patents by Inventor Xiaoqun Liu

Xiaoqun Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11031776
    Abstract: Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: June 8, 2021
    Assignee: NXP B.V.
    Inventors: Siamak Delshadpour, Xiaoqun Liu
  • Patent number: 10998897
    Abstract: A power switch over current protection system including a power switch transistor configured to deliver a power current from a power source to power load, a power switch driver configured to control and on/off state of the power switch, an over current protection (OCP) circuit to detect a threshold value of the power current, a discharge transistor configured to discharge a parasitic capacitance of the power switch transistor, and a system state machine to receive a signal from the OCP circuit configured to control an action of the power switch driver and discharge transistor depending on the level of the power current.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: May 4, 2021
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Madan Mohan Reddy Vemula
  • Patent number: 10826386
    Abstract: A multi-stage charge pump including a first stage configured to generate a first output voltage, a last stage configured to receive the first output voltage from the first stage and output a second output voltage, a switch configured to receive the second output voltage from the last stage, and a voltage regulator circuit configured to control the second output voltage of the last stage to maintain a substantially constant on-resistance of the switch.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: November 3, 2020
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Madan Mohan Reddy Vemula
  • Patent number: 10811963
    Abstract: A multi-stage charge pump circuit including a first stage of the multi-stage charge pump having a first voltage output, a last stage of the multi-stage charge pump having a first voltage input, and an inter-stage limitation circuit configured to protect a voltage drop of the first voltage output of the first stage of the multi-stage charge pump when there is a voltage drop on the first voltage input of the last stage of the multi-stage charge pump.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: October 20, 2020
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Madan Mohan Reddy Vemula
  • Publication number: 20200313428
    Abstract: An over-voltage tolerant test bus for an integrated circuit (IC) is disclosed. The over-voltage tolerant test bus includes a first switch to be coupled to a test pin of the IC and a second switch to be coupled to an internal module of the IC. The second switch is coupled to the first switch in series. The over-voltage tolerant test bus also includes a protection circuit coupled between the first switch and the second switch and a supply voltage to keep a voltage between a source and a drain of the first switch substantially equal to a difference between a voltage at the test pin and the supply voltage.
    Type: Application
    Filed: March 25, 2019
    Publication date: October 1, 2020
    Inventors: Siamak Delshadpour, Xiaoqun Liu
  • Publication number: 20200153240
    Abstract: Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage.
    Type: Application
    Filed: November 8, 2018
    Publication date: May 14, 2020
    Inventors: Siamak Delshadpour, Xiaoqun Liu
  • Publication number: 20200136601
    Abstract: A power switch over current protection system including a power switch transistor configured to deliver a power current from a power source to power load, a power switch driver configured to control and on/off state of the power switch, an over current protection (OCP) circuit to detect a threshold value of the power current, a discharge transistor configured to discharge a parasitic capacitance of the power switch transistor, and a system state machine to receive a signal from the OCP circuit configured to control an action of the power switch driver and discharge transistor depending on the level of the power current.
    Type: Application
    Filed: October 25, 2018
    Publication date: April 30, 2020
    Inventors: Xiaoqun LIU, Madan Mohan Reddy VEMULA
  • Publication number: 20200136503
    Abstract: A multi-stage charge pump circuit including a first stage of the multi-stage charge pump having a first voltage output, a last stage of the multi-stage charge pump having a first voltage input, and an inter-stage limitation circuit configured to protect a voltage drop of the first voltage output of the first stage of the multi-stage charge pump when there is a voltage drop on the first voltage input of the last stage of the multi-stage charge pump.
    Type: Application
    Filed: October 26, 2018
    Publication date: April 30, 2020
    Inventors: Xiaoqun LIU, Madan Mohan Reddy VEMULA
  • Publication number: 20200136502
    Abstract: A multi-stage charge pump including a first stage configured to generate a first output voltage, a last stage configured to receive the first output voltage from the first stage and output a second output voltage, a switch configured to receive the second output voltage from the last stage, and a voltage regulator circuit configured to control the second output voltage of the last stage to maintain a substantially constant on-resistance of the switch.
    Type: Application
    Filed: October 26, 2018
    Publication date: April 30, 2020
    Inventors: Xiaoqun LIU, Madan Mohan Reddy VEMULA
  • Patent number: 10594285
    Abstract: A signal detector includes an input to receive a differential signal, a generator to generate a first voltage based on the differential signal and a second voltage based on the first voltage and a predetermined voltage, and an output stage to output a detection signal based on the first voltage and the second voltage. The differential signal includes a first signal and a second signal. The detection signal has a first value when a difference between the first and second signals is in a first range and a second value when the difference between the first and second signals is in a second range. The detection signal may indicate the presence or absence of low frequency periodic signaling for the differential signal. Such a detector may demonstrate fast response and operate at low-current.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 17, 2020
    Assignee: NXP B.V.
    Inventors: Siamak Delshadpour, Soon-Gil Jung, Xiaoqun Liu
  • Patent number: 10432432
    Abstract: An electronic circuit, including an equalizer circuit to input a differential signal, a rectifier circuit to receive the differential signal and output a first current and a second current, a replica circuit to receive a differential threshold signal and output a third current and a fourth current to compensate for PVT variations in the first and second currents, and a comparator circuit configured to compare a differential voltage generated based on the first, second, third, and fourth currents to determine a loss of signal event of the electronic circuit.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: October 1, 2019
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Siamak Delshadpour, Ahmad Yazdi
  • Publication number: 20190020194
    Abstract: A clamp circuit disposed between a receptacle and a circuit to be protected when a connector connects to the receptacle, the clamp circuit including a voltage detector configured to determine a level of a surge voltage in comparison to a threshold voltage, the voltage detector including a plurality of field effect transistors (FETs) of a first conductivity type connected in series, a first FET of a second conductivity type and a first resistor in parallel with the plurality of FETs, a second FET of the first conductivity type in parallel with the first FET, and a discharge circuit to discharge the surge voltage when the surge voltage approaches the threshold voltage.
    Type: Application
    Filed: July 17, 2017
    Publication date: January 17, 2019
    Inventors: Xiaoqun LIU, Ahmad YAZDI, Stefan KWAAITAAL, Cor SPEELMAN, Xu ZHANG
  • Patent number: 9678111
    Abstract: A system can provide current detection in an integrated circuit (IC) chip while compensating for variations in circuit components resulting from process, voltage supply, temperature, or combinations thereof. The system can include the IC chip that has a power switch circuit that includes a power circuit path including a first transistor connected to a power source through a first conductive trace that has a first resistance value, and to a load by a second conductive trace having a second resistance value. A current detection circuit is configured to compensate for the variations in the power switch circuit using a sense circuit path that is configured to match process, voltage supply, and temperature variations in the power circuit path.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: June 13, 2017
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Siamak Delshadpour
  • Publication number: 20170102413
    Abstract: A system can provide current detection in an integrated circuit (IC) chip while compensating for variations in circuit components resulting from process, voltage supply, temperature, or combinations thereof. The system can include the IC chip that has a power switch circuit that includes a power circuit path including a first transistor connected to a power source through a first conductive trace that has a first resistance value, and to a load by a second conductive trace having a second resistance value. A current detection circuit is configured to compensate for the variations in the power switch circuit using a sense circuit path that is configured to match process, voltage supply, and temperature variations in the power circuit path.
    Type: Application
    Filed: October 7, 2015
    Publication date: April 13, 2017
    Inventors: Xiaoqun Liu, Siamak Delshadpour