Abstract: Large semiconductor ICs provide the processing power for billions of electronic devices used in every facet of modern life. Multiphase converters are the most common means of providing the current required for these CPUs, GPUs, and ASICs. Contemporary designs require 8, 12, 16, and even higher phase counts. Existing designs require each phase provide an independent current feedback line to the multiphase controller for current sharing purposes; this drastically increases the pin count of the controller and creates congestion in PCB routing. Our new idea moves the current sharing function to the power stage element, thereby reducing the cost of the controller and the complexity of the PCB.

Abstract: A portable liquid collection device includes a liquid collector, a guide tube and a liquid collection tube. The liquid collector includes a flowing liquid hole and an anti-slip structure. The guide tube includes two ends, one end connects to the liquid collector, and the other end is in a needle-shaped structure and connects to the liquid collection tube. A gas channel and a liquid channel are disposed in a tube body of the guide tube. The guide tube is provided with an outer annular structure. The liquid collection tube includes a collection tube body and a collection tube cover. The collection tube cover includes a tube cover body and a blocking plug. A placing slot for placing the blocking plug is disposed between the top and the bottom of the tube cover body.

Abstract: A portable liquid collection device includes a liquid collector, a guide tube and a liquid collection tube. The liquid collector includes a flowing liquid hole and an anti-slip structure. The guide tube includes two ends, one end connects to the liquid collector, and the other end is in a needle-shaped structure and connects to the liquid collection tube. A gas channel and a liquid channel are disposed in a tube body of the guide tube. The guide tube is provided with an outer annular structure. The liquid collection tube includes a collection tube body and a collection tube cover. The collection tube cover includes a tube cover body and a blocking plug. A placing slot for placing the blocking plug is disposed between the top and the bottom of the tube cover body.

Abstract: The present invention comprises a phase-module for phase add and drop in self-scalable fashion to achieve adaptive current sharing method, wherein includes a unique power device with features and functions such as a phase current threshold circuit, a current sharing bus circuit, a phase voltage detection circuit and a phase location programming capability. The phase-module is designed to be automatically added by a designed higher threshold current and is designed to be automatically dropped by a designed lower threshold current.

Abstract: This present invention comprises the multiple power sections and a multi-input operational amplifier, wherein the pilot device places at the different location of the main power MOSFET form multiple individual power section, the multi-input operational amplifier drives a transistor to detect the overall current of each power section furthermore report the overall current to system.

Abstract: DC-DC converter PWM controllers and dual counter digital integrators are presented for integrating an error between a reference voltage signal and a feedback voltage signal, in which a comparator, dual counters, and a DAC are used to provide a compensated reference to a modulator loop comparator which generates a PWM switching signal for controlling a power converter output voltage, with the second counter being selectively incremented or decremented when the first counter output indicates a predetermined value after the first counter output transitions in one direction through a predetermined count range to enhance loop stability, and a startup mode control allows fast integrator operation during initialization, with the ability to freeze integrator operation during overcurrent conditions.

Abstract: DC to DC converters and pulse width modulation controllers are presented with compensation circuitry to mitigate discontinuous conduction mode (DCM) undershoot and continuous conduction mode offsets in inductor current emulation information by providing compensation signals proportional to the output voltage and the converter off time (Toff) when the low side converter switch is actuated.

Abstract: DC-DC converter PWM controllers and dual counter digital integrators are presented for integrating an error between a reference voltage signal and a feedback voltage signal, in which a comparator, dual counters, and a DAC are used to provide a compensated reference to a modulator loop comparator which generates a PWM switching signal for controlling a power converter output voltage, with the second counter being selectively incremented or decremented when the first counter output indicates a predetermined value after the first counter output transitions in one direction through a predetermined count range to enhance loop stability, and a startup mode control allows fast integrator operation during initialization, with the ability to freeze integrator operation during overcurrent conditions.

Abstract: Systems and devices for smooth light load operation in a DC/DC converter are presented. The disclosed systems and methods enable smooth discontinuous conduction mode (DCM)/continuous conduction mode (CCM) transition. The disclosed systems and methods of smooth light load operation in a DC/DC converter may also avoid the generation of sub-harmonics during light load operation. In an example embodiment, a rising ramp is used to control the ON time of the converter oscillator, while a falling ramp controls the OFF time. During DCM operation, the minimum value of the falling ramp is clamped. The clamping of the falling ramp ensures a substantially similar level of the error amplifier output in both CCM and DCM and avoids disturbances caused by a difference in the error amplifier outputs between the modes.

Abstract: DC to DC converters and pulse width modulation controllers are presented with compensation circuitry to mitigate discontinuous conduction mode (DCM) undershoot and continuous conduction mode offsets in inductor current emulation information by providing compensation signals proportional to the output voltage and the converter off time (Toff) when the low side converter switch is actuated.

Abstract: Systems and devices for ripple reduction in a DC/DC converter are presented. The disclosed systems and methods enable ripple reduction in discontinuous conduction mode (DCM) operation. In DCM, the inductor current peak to peak ripple may be reduced based on the load current. To achieve the reduction of the inductor peak to peak current ripple, a digital counter is used to count the time between consecutive PWM pulses. The digital output of the counter is used to control the pulse width modulation. As the digital output of the counter increases, the PWM on-time decreases. Since the PWM pulse is demanded by the load in DCM mode, the peak to peak inductor ripple is modulated by the counter, or, in turn, modulated by the load current.

Abstract: Systems and devices for smooth light load operation in a DC/DC converter are presented. The disclosed systems and methods enable smooth discontinuous conduction mode (DCM)/continuous conduction mode (CCM) transition. The disclosed systems and methods of smooth light load operation in a DC/DC converter may also avoid the generation of sub-harmonics during light load operation. In an example embodiment, a rising ramp is used to control the ON time of the converter oscillator, while a falling ramp controls the OFF time. During DCM operation, the minimum value of the falling ramp is clamped. The clamping of the falling ramp ensures a substantially similar level of the error amplifier output in both CCM and DCM and avoids disturbances caused by a difference in the error amplifier outputs between the modes.

Abstract: Systems and devices for ripple reduction in a DC/DC converter are presented. The disclosed systems and methods enable ripple reduction in discontinuous conduction mode (DCM) operation. In DCM, the inductor current peak to peak ripple may be reduced based on the load current. To achieve the reduction of the inductor peak to peak current ripple, a digital counter is used to count the time between consecutive PWM pulses. The digital output of the counter is used to control the pulse width modulation. As the digital output of the counter increases, the PWM on-time decreases. Since the PWM pulse is demanded by the load in DCM mode, the peak to peak inductor ripple is modulated by the counter, or, in turn, modulated by the load current.

Abstract: One embodiment of the invention includes a power regulator system. The system includes a switching system configured to generate an output voltage across a load based on a high-side switch coupling a power voltage to an output at an edge-trigger of a PWM control signal having an activation pulse-width of the high-side switch. The system also includes a switch driver system configured to set a duty-cycle of the PWM control signal such that the activation pulse-width of the PWM control signal is based on the power regulator system operating in one of a continuous conduction mode (CCM) and a discontinuous conduction mode (DCM). The edge-trigger of the PWM control signal can occur based on a relative magnitude of the output voltage and the power voltage while operating in the DCM.

Abstract: A multi-phase power system including a plurality of Pulse Width Modulation (PWM) controllers is provided, including a first PWM controller and at least one second PWM controller. The first PWM controller is configured to generate at least one first output signal based on a first clock signal, and to insert at least one synchronizing pulse into the first clock signal, the synchronizing pulse having a predetermined characteristic differing from pulses of the first clock signal, and to provide the first clock signal including the synchronizing pulse to the second PWM controller. The second PWM controller is configured to generate at least one second output signal based on the first clock signal, and to synchronize the generation of the first and second output signals using the synchronizing pulse within the first clock signal, thereby maintaining a predetermined phase relationship between the first and second output signals.

Abstract: One embodiment of the invention includes a power regulator system. The system includes a switching system configured to generate an output voltage across a load based on a high-side switch coupling a power voltage to an output at an edge-trigger of a PWM control signal having an activation pulse-width of the high-side switch. The system also includes a switch driver system configured to set a duty-cycle of the PWM control signal such that the activation pulse-width of the PWM control signal is based on the power regulator system operating in one of a continuous conduction mode (CCM) and a discontinuous conduction mode (DCM). The edge-trigger of the PWM control signal can occur based on a relative magnitude of the output voltage and the power voltage while operating in the DCM.

Abstract: Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp generator to generate first and second ramp signals that interact to form a virtual ramp signal; and a comparator module coupled to the ramp generator configured to produce a pulse width modulated signal based on a comparison between the virtual ramp signal and an input signal.

Abstract: An apparatus for driving a pulse width modulation reference signal includes: (a) A converting unit receiving an input signal at an input locus and presenting an output current at an output locus. The input signal varies at a first frequency. The output current is substantially related with the first frequency. (b) A capacitive element coupled with the output locus for charging by the output current. The pulse width modulation reference signal is related with voltage across the capacitive element.

Abstract: Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp generator to generate first and second ramp signals that interact to form a virtual ramp signal; and a comparator module coupled to the ramp generator configured to produce a pulse width modulated signal based on a comparison between the virtual ramp signal and an input signal.

Abstract: A multi-phase power system including a plurality of Pulse Width Modulation (PWM) controllers is provided, including a first PWM controller and at least one second PWM controller. The first PWM controller is configured to generate at least one first output signal based on a first clock signal, and to insert at least one synchronizing pulse into the first clock signal, the synchronizing pulse having a predetermined characteristic differing from pulses of the first clock signal, and to provide the first clock signal including the synchronizing pulse to the second PWM controller. The second PWM controller is configured to generate at least one second output signal based on the first clock signal, and to synchronize the generation of the first and second output signals using the synchronizing pulse within the first clock signal, thereby maintaining a predetermined phase relationship between the first and second output signals.