Patents by Inventor Ya-Ting YANG

Ya-Ting YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10116952
    Abstract: A stream decoding method is provided. The stream includes a plurality of frames. The method includes: obtaining a display order of a current frame that belongs to a group by parsing a header of the current frame; and determining whether to decode the current frame or to drop instead of decoding the current frame according to the display order of the current frame.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: October 30, 2018
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: He-Yuan Lin, Ya-Ting Yang, Yi-Shin Tung
  • Publication number: 20170324967
    Abstract: A method for controlling bitstream decoding is provided. The bitstream includes a plurality of frames. The method includes: generating a performance indicator according to a decoding time of at least one previous frame; generating a dropping decision according to the performance indicator, wherein the dropping decision indicates whether it is needed to drop a frame; and determining whether to drop a current frame according to the dropping decision.
    Type: Application
    Filed: November 2, 2016
    Publication date: November 9, 2017
    Inventors: Ya-Ting Yang, Yi-Shin Tung
  • Patent number: 9741313
    Abstract: A gate driving circuit includes a shift register circuit and an auxiliary circuit which are disposed at different sides of a pixel array. The shift register circuit includes an (N?1)th shift register stage for generating an (N?1)th gate signal according to a first clock, an Nth shift register stage for generating an Nth gate signal according to a second clock, and an (N+1)th shift register stage for generating an (N+1)th gate signal according to a third clock. The auxiliary circuit includes a first transistor. The first transistor performs the signal voltage stabilization and level switching acceleration operations on the Nth gate signal according to the (N?1)th gate signal and the second clock.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: August 22, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Chien-Chang Tseng, Kuang-Hsiang Liu, Ya-Ting Yang
  • Publication number: 20170155918
    Abstract: A stream decoding method is provided. The stream includes a plurality of frames. The method includes: obtaining a display order of a current frame that belongs to a group by parsing a header of the current frame; and determining whether to decode the current frame or to drop instead of decoding the current frame according to the display order of the current frame.
    Type: Application
    Filed: January 11, 2016
    Publication date: June 1, 2017
    Inventors: He-Yuan LIN, Ya-Ting YANG, Yi-Shin TUNG
  • Publication number: 20150332652
    Abstract: A gate driving circuit includes a shift register circuit and an auxiliary circuit which are disposed at different sides of a pixel array. The shift register circuit includes an (N?1)th shift register stage for generating an (N?1)th gate signal according to a first clock, an Nth shift register stage for generating an Nth gate signal according to a second clock, and an (N+1)th shift register stage for generating an (N+1)th gate signal according to a third clock. The auxiliary circuit includes a first transistor. The first transistor performs the signal voltage stabilization and level switching acceleration operations on the Nth gate signal according to the (N?1)th gate signal and the second clock.
    Type: Application
    Filed: July 30, 2015
    Publication date: November 19, 2015
    Inventors: Chien-Chang Tseng, Kuang-Hsiang Liu, Ya-Ting Yang
  • Patent number: 9136700
    Abstract: An electrostatic discharge protection circuit and a display apparatus are provided. The electrostatic discharge protection circuit adapted to the display apparatus having a display panel which has a signal line and a common voltage line. The electrostatic discharge protection circuit includes a first switching unit and a second switching unit. The first switching unit is electrically coupled to the signal line. The second switching unit is electronically coupled between the first switching unit and the common voltage line. When the display apparatus is shut down, the first switching unit and the second switching unit form a conductive path. When the display apparatus is turned on, the first switching unit receives a first control signal, and the second switching unit receives a second control signal, so that at least one of the first switching unit and the second switching unit is turned off at the same time.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: September 15, 2015
    Assignee: Au Optronics Corporation
    Inventors: Chien-Chang Tseng, Kuang-Hsiang Liu, Ya-Ting Yang
  • Patent number: 9129574
    Abstract: A gate driving circuit includes a shift register circuit and an auxiliary circuit which are disposed at different sides of a pixel array. The shift register circuit includes an (N?1)th shift register stage for generating an (N?1)th gate signal according to a first clock, an Nth shift register stage for generating an Nth gate signal according to a second clock, and an (N+1)th shift register stage for generating an (N+1)th gate signal according to a third clock. The auxiliary circuit includes a first transistor. The first transistor performs the signal voltage stabilization and level switching acceleration operations on the Nth gate signal according to the (N?1)th gate signal and the second clock.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: September 8, 2015
    Assignee: AU Optronics Corp.
    Inventors: Chien-Chang Tseng, Kuang-Hsiang Liu, Ya-Ting Yang
  • Publication number: 20140071109
    Abstract: An electrostatic discharge protection circuit and a display apparatus are provided. The electrostatic discharge protection circuit adapted to the display apparatus having a display panel which has a signal line and a common voltage line. The electrostatic discharge protection circuit includes a first switching unit and a second switching unit. The first switching unit is electrically coupled to the signal line. The second switching unit is electronically coupled between the first switching unit and the common voltage line. When the display apparatus is shut down, the first switching unit and the second switching unit form a conductive path. When the display apparatus is turned on, the first switching unit receives a first control signal, and the second switching unit receives a second control signal, so that at least one of the first switching unit and the second switching unit is turned off at the same time.
    Type: Application
    Filed: May 2, 2013
    Publication date: March 13, 2014
    Applicant: Au Optronics Corporation
    Inventors: Chien-Chang Tseng, Kuang-Hsiang Liu, Ya-Ting Yang
  • Publication number: 20130127797
    Abstract: A gate driving circuit includes a shift register circuit and an auxiliary circuit which are disposed at different sides of a pixel array. The shift register circuit includes an (N?1)th shift register stage for generating an (N?1)th gate signal according to a first clock, an Nth shift register stage for generating an Nth gate signal according to a second clock, and an (N+1)th shift register stage for generating an (N+1)th gate signal according to a third clock. The auxiliary circuit includes a first transistor. The first transistor performs the signal voltage stabilization and level switching acceleration operations on the Nth gate signal according to the (N?1)th gate signal and the second clock.
    Type: Application
    Filed: April 9, 2012
    Publication date: May 23, 2013
    Inventors: Chien-Chang Tseng, Kuang-Hsiang Liu, Ya-Ting Yang
  • Publication number: 20110090957
    Abstract: A video codec method synchronizes long term reference frames in a video encoding device and a video decoding device of a video communication system. The video encoding device encodes video frames to code streams in an inter-prediction mode and set the corresponding reference frames to non-committed long term reference frames. The video decoding device decodes the code streams using the corresponding reference frames, then transmits an acknowledgement of the non-committed long term reference frames to the video encoding device. The video encoding device sets the non-committed long term reference frames to committed long term reference frames, and encodes succeeding video frames in the inter-prediction mode using the committed long term reference frames.
    Type: Application
    Filed: December 31, 2009
    Publication date: April 21, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIA-WEI LIAO, YA-TING YANG, YI-SHIN TUNG
  • Publication number: 20090145029
    Abstract: A guard fence for use in a drop test includes a frame defining a test area, four support legs respectively connected to the frame for supporting the frame, and four buffer curtains made of elastic materials and respectively disposed between two adjacent support legs for encircling the test area. As a result, when a drop test is conducted, the buffer curtains can effectively prevent the test sample from an undesired impact.
    Type: Application
    Filed: May 19, 2008
    Publication date: June 11, 2009
    Applicant: UNIVERSAL SCIENTIFIC INDUSTRIAL CO., LTD.
    Inventors: Jeng-Yan TONG, Se-Xin HSU, Ya-Ting YANG, Chia-Hung TSOU, Mei-Chung KAO