Abstract: A display device including a display panel having a display area. The display panel includes pixel circuits located in the display area. Each pixel circuit includes a driving transistor and a voltage regulating module that is configured to adjust a node voltage of the driving transistor by a voltage provided by one voltage regulating signal line of voltage regulating signal lines. The pixel circuits have data refresh frequencies including first and second frequencies. The first frequency is greater than the second frequency. When one pixel circuit performs data refreshing at the first frequency, one voltage regulating signal line is configured to provide a first voltage, and when one pixel circuit performs data refreshing at the second frequency, one voltage regulating signal line is configured to provide a second voltage not equal to the first voltage.

Abstract: A driving method of a display panel and a display panel are provided. Time for displaying one frame includes N times of first node potential adjustment stages, a data writing stage, and at least one first bias stress stage; the data writing stage is after the first node potential adjustment stage and before the first bias stress stage; the N times first node potential adjustment stage include N reset stages and N first adjustment voltage writing stages; and an i-th first voltage writing stage is after an i-th reset stage. In the reset stage, the first reset module is turned on to write a reset signal to the first node; in the first adjustment voltage writing phase, the first reset module is turned off, and the compensation module is turned on to write a first adjustment voltage into the first node to adjust the bias state of the driving transistor.

Abstract: A driving method of a display panel and a display panel are provided. Time for displaying one frame includes N times of first node potential adjustment stages, a data writing stage, and at least one first bias stress stage; the data writing stage is after the first node potential adjustment stage and before the first bias stress stage; the N times first node potential adjustment stage include N reset stages and N first adjustment voltage writing stages; and an i-th first voltage writing stage is after an i-th reset stage. In the reset stage, the first reset module is turned on to write a reset signal to the first node; in the first adjustment voltage writing phase, the first reset module is turned off, and the compensation module is turned on to write a first adjustment voltage into the first node to adjust the bias state of the driving transistor.

Abstract: A display device including a display panel having a display area. The display panel includes pixel circuits located in the display area. Each pixel circuit includes a driving transistor and a voltage regulating module that is configured to adjust a node voltage of the driving transistor by a voltage provided by one voltage regulating signal line of voltage regulating signal lines. The pixel circuits have data refresh frequencies including first and second frequencies. The first frequency is greater than the second frequency. When one pixel circuit performs data refreshing at the first frequency, one voltage regulating signal line is configured to provide a first voltage, and when one pixel circuit performs data refreshing at the second frequency, one voltage regulating signal line is configured to provide a second voltage not equal to the first voltage.

Abstract: A display method is applied to a display apparatus including a display panel, a display driver chip, and a microprocessor. The display method includes outputting, by the display panel, a scanning-done signal of a first frame image generated after scanning rows of pixel circuits of the display panel; after the microprocessor or the display driver chip receives the scanning-done signal, writing, by the display driver chip, initial data of a second frame image provided by the microprocessor and outputting, by the display driver chip, display data of the second frame image to the display panel based on the initial data; or outputting, by the display driver chip, the display data of the second frame image to the display panel in response to the scanning-done signal, the display data being generated based on the initial data provided by the microprocessor. The second frame image follows the first frame image.

Abstract: The method includes, in a low-frequency driving mode where a keeping phase is arranged between two active phases, providing a light-emitting control signal with a duty cycle of a % to a pixel circuit during the active phase; and performing first and second switches on the light-emitting control signal during the keeping phase. The first switch is performed before the second switch. Panel brightness at the first switch is higher than panel brightness at the second switch. The duty cycle of the light-emitting control signal is b % after the second switch. b>a. A total duration of active levels of the light-emitting control signal within one frame after the first switch is between a total duration of active levels of the light-emitting control signal with the duty cycle of a % and a total duration of active levels of the light-emitting control signal with the duty cycle of b % within one frame.

Abstract: A display panel includes a fundamental frequency display frame and a low frequency display frame. In the fundamental frequency display frame, a light emission control signal includes a light emission control period. A bias adjustment signal includes a bias adjustment period. The bias adjustment period is M times greater than the light emission control period. The fundamental frequency display frame includes a fundamental frequency scan stage. The time of the fundamental frequency scan stage is N times greater than the light emission control period. The low frequency display frame includes a fundamental frequency scan stage and a blank stage. The blank stage includes at least a non-bias stage. The time of the non-bias stage is L times greater than the light emission control period. L is not an integer multiple of M.

Abstract: A display panel and a display device, including a substrate, a circuit layer located at a side of the substrate, and a top light-shielding layer configured to receive a voltage signal. The circuit layer includes a light-emitting shift circuit, including a first output module and a control module. The first output module is electrically connected to a first node, a first fixed potential signal line, and a light-emitting control signal line and is configured to, in response to a voltage of the first node, transmit a light-emitting enable voltage provided by the first fixed-potential signal line to the light-emitting control signal line. The control module is connected to the first node and includes a control transistor. The top light-shielding layer is located at a side of the control transistor. In a direction perpendicular to the substrate, the top light-shielding layer overlaps with a channel of the control transistor.

Abstract: Provided are a display panel, a driving method thereof and a display apparatus. The display panel includes bias signal lines and pixel circuits. A pixel circuit includes a drive module and a bias module. The bias module is connected between a first terminal of the drive module and a bias signal line. A display region of the display panel includes a first display region and a second display region. The bias signal lines include a first bias signal line and a second bias signal line. Bias modules in the first display region are connected to the first bias signal line. Bias modules in the second display region are connected to the second bias signal line. In at least part of turning-on stages of bias modules, a voltage transmitted by the first bias signal line is different from a voltage transmitted by the second bias signal line.

Abstract: Provided are a display panel, a method for driving a display panel, and a display apparatus. The display panel includes a light-emitting element, a pixel driver circuit, and a control circuit. The pixel driver circuit includes a driver transistor and a first light emission control switch. A working mode of the display panel includes a first mode. In the first mode, a working cycle of the pixel driver circuit includes a data writing phase and at least one data holding phase subsequent to the data writing phase. The data writing phase includes at least one first light-emitting period. The data holding phase includes at least one second light-emitting period. The control circuit controls a duration of a first one of the at least one first light-emitting period in the data writing phase to be less than a duration of one of the at least one second light-emitting period.

Abstract: A display panel has functional component regions arranged along a first direction and a display region at least partially surrounding the functional component regions. The display panel includes first signal lines located in the display region. One of the first signal lines has a least one part extending in the first direction, and the first signal lines are arranged in a second direction intersecting with the first direction. The first signal lines include a first-type signal line and a second-type signal line, and the first-type signal line at least partially surrounds the functional component regions. In the first direction, at least one second-type signal line is broken at two sides of one of the functional component region.

Abstract: The display panel includes pixel groups including multiple sub-pixels; and driving signal lines. One driving signal line corresponds to at least one pixel group of the pixel groups, and multiple driving signal lines sequentially output a charging enabling level to drive corresponding pixel groups. The sub-pixel includes a first color sub-pixel that includes a first sub-pixel and a second sub-pixel. The first and second sub-pixels are arranged along an arrangement direction of the pixel group, and the second sub-pixel and the first sub-pixel are spaced by other first color sub-pixels whose number is not greater than a preset number. In a first mode, the display panel receives a noise signal, and a phase difference between charging enabling levels provided by the driving signal lines corresponding to the first sub-pixel and the second sub-pixel is non-integer times a noise cycle.

Abstract: A display panel, a method for driving the same, and a display apparatus are provided. A pixel driving circuit includes a driving transistor, a data writing circuit, and an adjusting circuit. The driving transistor has a gate electrically connected to a first node, and first and second electrodes respectively electrically connected to a second node and a third node. An operating period of the pixel driving circuit comprises a data writing period including first and second adjusting stages and a data writing period between the first and second adjusting stages. A data writing circuit is configured to provide a data signal to the second node during the data writing period. An adjusting circuit is configured to provide a first adjusting signal to the second node or the third node during the first adjusting stage, and to provide a second adjusting signal to the second node during the second adjusting stage.

Abstract: Display panel and display device are provided. The display panel includes a first light-transmitting group, a first non-display area, and a display area; and a plurality of pixel driving circuits and a plurality of drive signal lines. The first non-display area surrounds the first light-transmitting group, the display area surrounds the first non-display area, and the first light-transmitting group includes at least two first light-transmitting areas arranged along a first direction. The plurality of pixel driving circuits is in the display area, a pixel driving circuit of the plurality of pixel driving circuits includes a data writing module, and a drive signal line of the plurality of drive signal lines is electrically connected to a control terminal of the data writing module.

Abstract: An array substrate, a display panel and a display device are provided. The array substrate includes: a substrate, a pixel circuit arranged on one side of the substrate and a body part. The pixel circuit includes a driving transistor and a threshold compensation transistor, a first electrode of the threshold compensation transistor is connected to a gate of the driving transistor, and a second electrode of the threshold compensation transistor and a first electrode of the driving transistor are both connected to a connection part. The body part is electrically connected to a power supply voltage signal end. An orthographic projection of the connection part on the substrate at least partially overlaps with an orthographic projection of the body part on the substrate.

Abstract: A display device including a display panel having a display area. The display panel includes pixel circuits located in the display area. Each pixel circuit includes a driving transistor and a voltage regulating module that is configured to adjust a node voltage of the driving transistor by a voltage provided by one voltage regulating signal line of voltage regulating signal lines. The pixel circuits have data refresh frequencies including first and second frequencies. The first frequency is greater than the second frequency. When one pixel circuit performs data refreshing at the first frequency, one voltage regulating signal line is configured to provide a first voltage, and when one pixel circuit performs data refreshing at the second frequency, one voltage regulating signal line is configured to provide a second voltage not equal to the first voltage.

Abstract: A display panel and a display apparatus are provided. The display panel includes data lines located in a display region, and a power bus, connection traces, and a control circuit that are located in a non-display region. The connection trace at least partially overlaps with the power bus in a direction perpendicular to a plane of the display panel, and has a first area that is an overlapping area between the connection trace and the power bus. The control circuit includes control transistors. A first electrode and/or a second electrode of the control transistor is coupled to the connection trace. The control transistors include a first control transistor and a second control transistor. The connection trace coupled to the first control transistor and the connection trace coupled to the second control transistor have different first areas. Channel areas of the first control transistor and the second control transistor are different.

Abstract: A display apparatus and a method for driving the same are provided. The display apparatus includes pixel circuits and a threshold detection module. The pixel circuit includes a driving transistor and a data voltage writing module including an output terminal electrically connected to the driving transistor. The threshold detection module is configured to detect a threshold voltage of the driving transistor. An operating process of the pixel circuit includes a first phase and a second phase. The first phase includes a data writing phase and a light-emitting phase. The second phase includes an adjusting phase and a light-emitting phase. The driving transistor receives a data voltage during the data writing phase. During the adjusting phase, the driving transistor receives an adjusting voltage corresponding to the threshold voltage of the driving transistor that is detected by the threshold detection module.

Abstract: Provided a pixel circuit, a method for driving a pixel circuit, a display panel, and a display apparatus. The pixel circuit applied in a display panel includes a data writing module, a drive transistor, a leakage current alleviation module, a first power supply terminal, and a data signal terminal. The data writing module configured to write data signal of the data signal terminal to gate of the drive transistor in data writing stage; the leakage current alleviation module configured to transmit leakage current generated by the data writing module to first power supply terminal in leakage current alleviation stage; and the drive transistor configured to drive a light-emitting element to emit light in light emission stage. The leakage current alleviation stage located at least between the data writing stage and the light emission stage, enhancing the luminance accuracy of the light-emitting element and the display uniformity of the display panel.

Abstract: Provided are an organic light-emitting display panel, a driving method and a driving device therefor. The driving method includes: setting brightness levels of the organic light-emitting display panel and maximum gray scale brightness levels, and maximum gray scale brightness levels include a first maximum gray scale brightness corresponding to a maximum brightness level of the organic light-emitting display panel, and an effective pulse duty cycle of a light-emitting control signal for driving the first maximum gray scale brightness is defined as a first effective pulse duty cycle; determining a target brightness level of the switched picture and a target maximum gray scale brightness corresponding to the target brightness level; adjusting the target effective pulse duty cycle of the light-emitting control signal for driving the switched picture.