Patents by Inventor Yasuharu Hosaka

Yasuharu Hosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954276
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka
  • Patent number: 11942554
    Abstract: In a transistor that includes an oxide semiconductor, a change in electrical characteristics is suppressed and the reliability is improved. A semiconductor device that includes a transistor is provided. The transistor includes a first conductive film that functions as a first gate electrode, a first gate insulating film, a first oxide semiconductor film that includes a channel region, a second gate insulating film, and a second oxide semiconductor film and a second conductive film that function as a second gate electrode. The second oxide semiconductor film includes a region higher in carrier density than the first oxide semiconductor film. The second conductive film includes a region in contact with the first conductive film.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: March 26, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Yukinori Shima, Masataka Nakada, Masami Jintyou
  • Publication number: 20240079502
    Abstract: A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Inventors: Junichi KOEZUKA, Kenichi OKAZAKI, Yukinori SHIMA, Yasutaka NAKAZAWA, Yasuharu HOSAKA, Shunpei YAMAZAKI
  • Patent number: 11899328
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: February 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Yukinori Shima, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20240014218
    Abstract: A semiconductor device including a transistor with high on-state current and a fabrication method thereof are provided. A semiconductor device having favorable electrical characteristics and a fabrication method thereof are provided. The semiconductor device includes a substrate, an island-shaped insulating layer over the substrate, and a transistor over the substrate and the insulating layer. The transistor includes a gate electrode, a gate insulating layer, a semiconductor layer, and a pair of conductive layers. One of the pair of the conductive layers includes a region overlapping with the insulating layer, and the other of the pair of the conductive layers includes a region not overlapping with the insulating layer. The level of a top surface of the other of the pair of the conductive layers is lower than the level of a top surface of the one of the pair of the conductive layers. Each of the pair of the conductive layers is in contact with the semiconductor layer.
    Type: Application
    Filed: November 8, 2021
    Publication date: January 11, 2024
    Inventors: Rai SATO, Yasuharu HOSAKA, Yasutaka NAKAZAWA, Takashi SHIRAISHI, Kiyofumi OGINO, Kenichi OKAZAKI
  • Publication number: 20230420522
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Application
    Filed: September 8, 2023
    Publication date: December 28, 2023
    Applicant: Semiconductor Energy Laboratory Co., Lid.
    Inventors: Yasuharu Hosaka, Toshimitsu OBONAI, Yukinori SHIMA, Masami JINTYOU, Daisuke KUROSAKI, Takashi HAMOCHI, Junichi KOEZUKA, Kenichi OKAZAKI, Shunpei YAMAZAKI
  • Patent number: 11842901
    Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, an oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The second insulating film comprises a silicon oxynitride film. When excess oxygen is added to the second insulating film by oxygen plasma treatment, oxygen can be efficiently supplied to the oxide semiconductor film.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: December 12, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masami Jintyou, Junichi Koezuka, Takashi Hamochi, Yasuharu Hosaka
  • Publication number: 20230387217
    Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 30, 2023
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Yukinori SHIMA, Junichi KOEZUKA, Kenichi OKAZAKI
  • Patent number: 11817508
    Abstract: A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: November 14, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Kenichi Okazaki, Yukinori Shima, Yasutaka Nakazawa, Yasuharu Hosaka, Shunpei Yamazaki
  • Patent number: 11791350
    Abstract: A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 ?m and less than or equal to 3 ?m is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: October 17, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Satoru Idojiri, Kenichi Okazaki, Hiroki Adachi, Daisuke Kubota
  • Publication number: 20230320135
    Abstract: Provided is a semiconductor device having a high degree of integration, which includes first and second transistors and a first insulating layer. The first transistor includes a first semiconductor layer, a second insulating layer, and first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and fourth to sixth conductive layers. The first insulating layer includes a region in contact with the first semiconductor layer and the first conductive layer and includes an opening reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The second conductive layer is positioned over the first insulating layer. The third conductive layer is positioned over the first semiconductor layer and includes a region overlapping with the inner wall of the opening with the second insulating layer positioned therebetween.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 5, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu HOSAKA, Masami JINTYOU, Takahiro IGUCHI, Chieko MISAMA, Ami SATO, Masayoshi DOBASHI
  • Publication number: 20230317856
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device includes a first insulating layer, a second insulating layer, a semiconductor layer, and a first conductive layer. The semiconductor layer, the second insulating layer, and the first conductive layer are stacked in this order over the first insulating layer. The second insulating layer has a stacked-layer structure in which a first insulating film, a second insulating film, and a third insulating film are stacked in this order. The first insulating film, the second insulating film, and the third insulating film each contain an oxide. The first insulating film includes a portion in contact with the semiconductor layer. The semiconductor layer contains indium, gallium, and oxygen and includes a region with an indium content percentage higher than a gallium content percentage.
    Type: Application
    Filed: April 10, 2023
    Publication date: October 5, 2023
    Inventors: Junichi KOEZUKA, Kenichi OKAZAKI, Yasuharu HOSAKA, Toshimitsu OBONAI, Yasutaka NAKAZAWA, Seiji YASUMOTO, Shunpei YAMAZAKI
  • Patent number: 11764074
    Abstract: To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: September 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Yukinori Shima, Masahiko Hayakawa, Takashi Hamochi, Suzunosuke Hiraishi
  • Patent number: 11757007
    Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: September 12, 2023
    Inventors: Yasuharu Hosaka, Toshimitsu Obonai, Yukinori Shima, Masami Jintyou, Daisuke Kurosaki, Takashi Hamochi, Junichi Koezuka, Kenichi Okazaki, Shunpei Yamazaki
  • Patent number: 11728392
    Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: August 15, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Yukinori Shima, Junichi Koezuka, Kenichi Okazaki
  • Patent number: 11637208
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. A semiconductor device includes a first insulating layer, a second insulating layer, a semiconductor layer, and a first conductive layer. The semiconductor layer, the second insulating layer, and the first conductive layer are stacked in this order over the first insulating layer. The second insulating layer has a stacked-layer structure in which a first insulating film, a second insulating film, and a third insulating film are stacked in this order. The first insulating film, the second insulating film, and the third insulating film each contain an oxide. The first insulating film includes a portion in contact with the semiconductor layer. The semiconductor layer contains indium, gallium, and oxygen and includes a region with an indium content percentage higher than a gallium content percentage.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: April 25, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Kenichi Okazaki, Yasuharu Hosaka, Toshimitsu Obonai, Yasutaka Nakazawa, Seiji Yasumoto, Shunpei Yamazaki
  • Patent number: 11616149
    Abstract: A semiconductor device with improved reliability is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a third oxide over the second oxide, and an insulator over the third oxide. The second oxide contains In, an element M (M is Al, Ga, Y, or Sn), and Zn. The first oxide and the third oxide each include a region whose In concentration is lower than that in the second oxide.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: March 28, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takuya Handa, Yasuharu Hosaka, Shota Sambonsuge, Yasumasa Yamane, Kenichi Okazaki
  • Publication number: 20230093499
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 23, 2023
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuharu HOSAKA, Yukinori SHIMA, Kenichi OKAZAKI, Shunpei YAMAZAKI
  • Patent number: 11531243
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: December 20, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Yukinori Shima, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20220359575
    Abstract: To provide a method for manufacturing a semiconductor device including an oxide semiconductor film having conductivity, or a method for manufacturing a semiconductor device including an oxide semiconductor film having a light-transmitting property and conductivity. The method for manufacturing a semiconductor device includes the steps of forming an oxide semiconductor film over a first insulating film, performing first heat treatment in an atmosphere where oxygen contained in the oxide semiconductor film is released, and performing second heat treatment in a hydrogen-containing atmosphere, so that an oxide semiconductor film having conductivity is formed.
    Type: Application
    Filed: July 11, 2022
    Publication date: November 10, 2022
    Inventors: Masashi OOTA, Noritaka ISHIHARA, Motoki NAKASHIMA, Yoichi KUROSAWA, Shunpei YAMAZAKI, Yasuharu HOSAKA, Toshimitsu OBONAI, Junichi KOEZUKA