Patents by Inventor Yasuhiko Kuriyama
Yasuhiko Kuriyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240096876Abstract: According to one embodiment, a semiconductor device includes a plurality of transistors. The transistors are coupled through serial coupling. The transistors include a first transistor and a second transistor. The semiconductor device further includes a third transistor and a first diode. The second transistor includes a first sub-transistor and a second sub-transistor that are coupled in parallel with each other. The first transistor, the first sub-transistor, the second sub-transistor, the third transistor, and the first diode are arranged on a substrate, with the third transistor interposed between the first sub-transistor and the second sub-transistor in a first direction.Type: ApplicationFiled: March 6, 2023Publication date: March 21, 2024Inventors: Takahiro NAKAGAWA, Kazuya NISHIHORI, Yasuhiko KURIYAMA
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Publication number: 20240097671Abstract: A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.Type: ApplicationFiled: February 10, 2023Publication date: March 21, 2024Inventors: Toru SUGIYAMA, Noriaki YOSHIKAWA, Yasuhiko KURIYAMA, Akira YOSHIOKA, Hitoshi KOBAYASHI, Hung HUNG, Yasuhiro ISOBE, Tetsuya OHNO, Hideki SEKIGUCHI, Masaaki ONOMURA
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Publication number: 20220302103Abstract: According to one embodiment, a first P-type transistor with a gate is coupled to a first node, and a drain is coupled to a second node. A first N-type transistor with a gate is coupled to the first node, and a drain is coupled to the second node. A second P-type transistor with a gate is coupled to the second node, and a drain is coupled to a third node. A second N-type transistor with a gate is coupled to the second node, and a drain is coupled to the third node. The first P-type transistor is smaller than the first N-type transistor. The second N-type transistor is smaller than the second P-type transistor. The second N-type transistor is smaller than the first N-type transistor.Type: ApplicationFiled: September 8, 2021Publication date: September 22, 2022Inventors: Toshiki SESHITA, Yasuhiko KURIYAMA
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Publication number: 20220302885Abstract: According to one embodiment, a high frequency amplifier circuit includes a first transistor including a gate to which an input signal is input; a second transistor including a gate grounded, and a source coupled to a drain of the first transistor; a first switch coupled between a first output terminal and a first node located between the drain of the second transistor and an inductor; a third transistor including a gate to which the input signal is input; a fourth transistor including a gate that is grounded, and a source coupled to a drain of the third transistor; a second switch coupled between a second output terminal and a second node located between the drain of the fourth transistor and an inductor; and a third switch coupled between the first node and the second node.Type: ApplicationFiled: September 10, 2021Publication date: September 22, 2022Inventors: Toshiki SESHITA, Yasuhiko KURIYAMA
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Patent number: 11336239Abstract: A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.Type: GrantFiled: May 26, 2020Date of Patent: May 17, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20220085773Abstract: According to one embodiment, a semiconductor circuit includes: an amplifier including an input terminal; an output circuit including a first node connected to the amplifier, and first and second output terminals, the output circuit performing a first output mode using one of the first and second output terminals or a second output mode using the first and second output terminals; and a bypass circuit between the input terminal and the first node. The output circuit includes a first switch between a second node and the first output terminal, a second switch between a third node and the second output terminal, a third switch between the second and third nodes, a first passive circuit connected to the second node, a second passive circuit connected to the third node, and a third passive circuit between the second and third nodes.Type: ApplicationFiled: March 15, 2021Publication date: March 17, 2022Inventors: Toshiki SESHITA, Yasuhiko KURIYAMA
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Patent number: 11095256Abstract: A semiconductor device includes three transistors, five switches, two inductors, and a capacitor. A first transistor has a gate. The switches have one terminal connected in series with a drain of the first transistor in parallel. A second transistor has a source connected to the first switch and a grounded gate. A third transistor having a source connected to the second switch and a grounded gate. A first inductor and a second inductor each has one terminal connected in series with the third switch in parallel. A fourth switch has one terminal connected to the first inductor and another terminal connected to the source of the second transistor. A fifth switch has one terminal connected to the second inductor and another terminal connected to the source of the third transistor. A capacitor connected between the one terminal of the fourth switch and the one terminal of the fifth switch.Type: GrantFiled: March 11, 2019Date of Patent: August 17, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toshiki Seshita, Yasuhiko Kuriyama
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Patent number: 10965256Abstract: Circuitry includes an amplifier circuit having a first transistor, an inductor, and a second transistor, and a distortion compensation circuit having a third transistor, a forth transistor, and a first capacitor. The first transistor is applied input signal. The inductor is connected to a source of the first transistor and grounded on another side. The second transistor has a source connected to a drain of the first transistor, a grounded gate and a drain connected to a power supply, and outputs an amplified signal. The third transistor has a drain and a gate connected to the drain, and is connected to the power supply on the drain. The fourth transistor has a drain and a gate connected to a source of the third transistor, and is grounded on a source. The first capacitor connects nodes between the drain of the first transistor and the source of the third transistor.Type: GrantFiled: August 8, 2019Date of Patent: March 30, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toshiki Seshita, Yasuhiko Kuriyama
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Patent number: 10931246Abstract: High-frequency amplifier circuitry has a common-source first transistor to amplify a high-frequency input signal, a common-gate second transistor to amplify a signal amplified by the first transistor to generate an output signal, a first inductor connected between a source of the first transistor and a first reference potential node, a second inductor connected between a drain of the second transistor and a second reference potential, a first switch to select whether to connect a first attenuator on an input signal path, a second switch to select whether to connect a first resistor between the input signal path and the first reference potential node, a third switch to select at least one of second resistors connected in parallel to the second inductor, and a fourth switch to select at least one of first capacitors connected in parallel on an output signal path connected to the drain of the second transistor.Type: GrantFiled: March 4, 2019Date of Patent: February 23, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toshiki Seshita, Yasuhiko Kuriyama
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Patent number: 10911007Abstract: High frequency amplifier circuitry includes a common-source first transistor to amplify a high-frequency input signal, a common-gate second transistor cascade-connected to the first transistor, to amplify a signal amplified by the first transistor to generate an output signal, a first inductor connected between a source of the first transistor and a first reference potential node, a second inductor connected between a drain of the second transistor and a second reference potential node, and non-linear compensation circuitry connected to a connection node of the first transistor and the second transistor, to compensate for non-linearity of the output signal to the high-frequency input signal. The non-linear compensation circuitry has first rectifier circuitry, a first resistor, a second resistor, second rectifier circuitry, first capacitor and second capacitor.Type: GrantFiled: March 1, 2019Date of Patent: February 2, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20200403580Abstract: A high-frequency amplifier circuitry includes a capacitor, a first transistor, a second transistor, and an ESD. The capacitor has one end connected to an input node. The first transistor has a gate connected to another end of the capacitor, and has a source grounded via an inductor. The second transistor is cascode-connected with the first transistor, has a gate grounded in a high-frequency manner, and outputs from a drain thereof a signal made by amplifying a signal output from a drain of the first transistor. The ESD protection circuitry includes a plurality of PN junction diodes, has a first terminal connected to the input node, has a second terminal grounded, and has a third terminal connected to the source of the first transistor.Type: ApplicationFiled: May 11, 2020Publication date: December 24, 2020Inventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20200382080Abstract: A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.Type: ApplicationFiled: May 26, 2020Publication date: December 3, 2020Inventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20200259464Abstract: Circuitry includes an amplifier circuit having a first transistor, an inductor, and a second transistor, and a distortion compensation circuit having a third transistor, a forth transistor, and a first capacitor. The first transistor is applied input signal. The inductor is connected to a source of the first transistor and grounded on another side. The second transistor has a source connected to a drain of the first transistor, a grounded gate and a drain connected to a power supply, and outputs an amplified signal. The third transistor has a drain and a gate connected to the drain, and is connected to the power supply on the drain. The fourth transistor has a drain and a gate connected to a source of the third transistor, and is grounded on a source. The first capacitor connects nodes between the drain of the first transistor and the source of the third transistor.Type: ApplicationFiled: August 8, 2019Publication date: August 13, 2020Inventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20200220503Abstract: A low noise amplifier has a first transistor that amplifies a high frequency input signal, a second transistor that further amplifies the amplified signal to generate an output signal, a first inductor connected between the source of the first transistor and a first reference potential node, a third transistor that is connected between the source of the first transistor and the first inductor, a first capacitor and a first resistor connected in series between a drain of the second transistor and an output node of the low noise amplifier, a second resistor and a third resistor connected in series between a gate of the third transistor and a second reference potential node, and a charge pump circuit that sets a potential of a connection node between the second resistor and the third resistor to a potential lower than a potential of the first reference potential node in the second mode.Type: ApplicationFiled: September 12, 2019Publication date: July 9, 2020Inventors: Toshiki Seshita, Yasuhiko Kuriyama
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Patent number: 10707823Abstract: High-frequency amplifier circuitry includes first amplifier circuitry, second amplifier circuitry, and noise figure improving circuitry. The first amplifier circuitry includes a first transistor and a grounded-gate third transistor. The first transistor has a source grounded via a first source inductor and a gate to which an input signal is applied. The third transistor is configured to output from a drain a signal obtained by amplifying a signal outputted from a drain of the first transistor. The second amplifier circuitry includes a same circuit constant as a circuit constant of the first amplifier circuitry and includes a second transistor and a grounded-gate fourth transistor. The noise figure improving circuitry connects the source of the first transistor and the source of the second transistor to each other.Type: GrantFiled: August 8, 2019Date of Patent: July 7, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20200007094Abstract: High frequency amplifier circuitry includes a common-source first transistor to amplify a high-frequency input signal, a common-gate second transistor cascade-connected to the first transistor, to amplify a signal amplified by the first transistor to generate an output signal, a first inductor connected between a source of the first transistor and a first reference potential node, a second inductor connected between a drain of the second transistor and a second reference potential node, and non-linear compensation circuitry connected to a connection node of the first transistor and the second transistor, to compensate for non-linearity of the output signal to the high-frequency input signal. The non-linear compensation circuitry has first rectifier circuitry, a first resistor, a second resistor, second rectifier circuitry, first capacitor and second capacitor.Type: ApplicationFiled: March 1, 2019Publication date: January 2, 2020Inventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20200007095Abstract: High-frequency amplifier circuitry has a common-source first transistor to amplify a high-frequency input signal, a common-gate second transistor to amplify a signal amplified by the first transistor to generate an output signal, a first inductor connected between a source of the first transistor and a first reference potential node, a second inductor connected between a drain of the second transistor and a second reference potential, a first switch to select whether to connect a first attenuator on an input signal path, a second switch to select whether to connect a first resistor between the input signal path and the first reference potential node, a third switch to select at least one of second resistors connected in parallel to the second inductor, and a fourth switch to select at least one of first capacitors connected in parallel on an output signal path connected to the drain of the second transistor.Type: ApplicationFiled: March 4, 2019Publication date: January 2, 2020Inventors: Toshiki Seshita, Yasuhiko Kuriyama
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Publication number: 20190372534Abstract: A semiconductor device includes three transistors, five switches, two inductors, and a capacitor. A first transistor has a gate. The switches have one terminal connected in series with a drain of the first transistor in parallel. A second transistor has a source connected to the first switch and a grounded gate. A third transistor having a source connected to the second switch and a grounded gate. A first inductor and a second inductor each has one terminal connected in series with the third switch in parallel. A fourth switch has one terminal connected to the first inductor and another terminal connected to the source of the second transistor. A fifth switch has one terminal connected to the second inductor and another terminal connected to the source of the third transistor. A capacitor connected between the one terminal of the fourth switch and the one terminal of the fifth switch.Type: ApplicationFiled: March 11, 2019Publication date: December 5, 2019Inventors: Toshiki Seshita, Yasuhiko Kuriyama
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Patent number: 10411658Abstract: An amplifier amplifies an input signal. A splitter branches an output signal of the amplifier into a first signal path and a second signal path and performs impedance conversion of the first and second signal paths. A first output terminal outputs the output signal of the amplifier or a signal obtained by branching the output signal of the amplifier into the first signal path by the splitter. A second output terminal outputs the output signal of the amplifier or a signal obtained by branching the output signal of the amplifier into the second signal path by the splitter. An output controller switches whether the output signal of the amplifier is output from the first output terminal, is output from the second output terminal, or is branched by the splitter to be output from both the first and second output terminals.Type: GrantFiled: December 14, 2017Date of Patent: September 10, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Toshiki Seshita, Yasuhiko Kuriyama
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Patent number: 10256775Abstract: A semiconductor device formed on a silicon on insulator substrate includes an input node to receive a first signal, such as a high frequency signal, and an output node to output a second signal corresponding to the first signal. A first transistor has a gate that receives the first signal from the input node and thereby outputs an amplified first signal. A second transistor is connected between a drain of the first transistor and the output node. An inductor is connected between a source of the first transistor and a ground potential. A capacitor connected is between the gate of the first transistor and the input node. An electrostatic discharge (ESD) protective element is connected between a first node and a second node. The first node is between the inductor and the first transistor, and the second node is between the input node and the capacitor.Type: GrantFiled: August 28, 2017Date of Patent: April 9, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Seshita, Yasuhiko Kuriyama