Abstract: A semiconductor device includes: a semiconductor chip; a protective film and an insulating film sequentially stacked over the semiconductor chip, and each having openings that expose source, drain, and gate pads; a heat dissipation terminal made of a material having a higher thermal conductivity than the insulating film; connection terminals formed on the source, drain, and gate pads and surrounded by the insulating film; and a mount substrate having connection pads. The semiconductor chip has a source electrode having a plurality of source fingers, a drain electrode having a plurality of drain fingers, and a gate electrode having a plurality of gate fingers. The source, drain, and gate pads are connected to the source electrode, the drain electrode, and the gate electrode, respectively. The connection terminals are respectively connected to the connection pads. The heat dissipation terminal is in close contact with the mount substrate.

Abstract: A semiconductor device includes a semiconductor layer stack formed on a substrate, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor layer stack, and are spaced from each other, a first control layer formed between the first ohmic electrode and the second ohmic electrode, and a first gate electrode formed on the first control layer. The first control layer includes a lower layer, an intermediate layer which is formed on the lower layer, and has lower impurity concentration than the lower layer, and an upper layer which is formed on the intermediate layer, and has higher impurity concentration than the intermediate layer.

Abstract: A bidirectional switching device includes a semiconductor multilayer structure made of a nitride semiconductor, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor multilayer structure, and a first gate electrode and a second gate electrode. The first gate electrode is covered with a first shield electrode having a potential substantially equal to that of the first ohmic electrode. The second gate electrode is covered with the second shield electrode having a potential substantially equal to that of the second ohmic electrode. An end of the first shield electrode is positioned between the first gate electrode and the second gate electrode, and an end of the second shield electrode is positioned between the second gate electrode and the first gate electrode.

Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider band gap than the first nitride semiconductor layer; and a third nitride semiconductor layer formed on the second nitride semiconductor layer. A region of the third nitride semiconductor layer located below the gate electrode is formed with a control region having a p-type conductivity, and a region of the third nitride semiconductor layer located between the gate electrode and each of the source electrode and the drain electrode is formed with a high resistive region having a higher resistance than the that of the control region.

Abstract: A bidirectional switch includes a plurality of unit cells 11 including a first ohmic electrode 15, a first gate electrode 17, a second gate electrode 18, and a second ohmic electrode 16. The first gate electrodes 15 are electrically connected via a first interconnection 31 to a first gate electrode pad 43. The second gate electrodes 18 are electrically connected via a second interconnection 32 to a second gate electrode pad 44. A unit cell 11 including a first gate electrode 17 having the shortest interconnect distance from the first gate electrode pad 43 includes a second gate electrode 18 having the shortest interconnect distance from the second gate electrode pad 44.

Abstract: An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased.

Abstract: A motor driving circuit includes a three-phase inverter circuit 8, including three upper-arm switching elements 56a to 56c for driving upper arms of different phases of a three-phase motor 3, and three lower-arm switching elements 56d to 56f for driving lower arms of different phases. At least one of the upper-arm switching elements 56a to 56c and the lower-arm switching elements 56d to 56f is a semiconductor element that performs a diode operation. The diode operation is an operation in which a voltage less than or equal to a threshold voltage of a gate electrode G is applied to the gate electrode G with reference to a potential of a first ohmic electrode S, thereby conducting a current flow from the first ohmic electrode S to a second ohmic electrode D and blocking a current flow from the second ohmic electrode D to the first ohmic electrode S.

Abstract: An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased.

Abstract: A semiconductor device includes a semiconductor layer stack 13 formed on a substrate 11 and having a channel region, a first electrode 16A and a second electrode 16B formed spaced apart from each other on the semiconductor layer stack 13, a first gate electrode 18A formed between the first electrode 16A and the second electrode 16B, and a second gate electrode 18B formed between the first gate electrode 18A and the second electrode 16B. A first control layer 19A having a p-type conductivity is formed between the semiconductor layer stack 13 and the first gate electrode 18A.

Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider band gap than the first nitride semiconductor layer; and a third nitride semiconductor layer formed on the second nitride semiconductor layer. A region of the third nitride semiconductor layer located below the gate electrode is formed with a control region having a p-type conductivity, and a region of the third nitride semiconductor layer located between the gate electrode and each of the source electrode and the drain electrode is formed with a high resistive region having a higher resistance than the that of the control region.

Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode.

Abstract: A power conversion circuit includes a bidirectional switch 2. The bidirectional switch 2 has a first gate terminal G1, a second gate terminal G2, a first ohmic terminal S1 and a second ohmic terminal S2. The bidirectional switch 2 has four operation states. In the first state, the bidirectional switch 2 operates as a diode having a cathode as the first ohmic terminal S1 and an anode as the second ohmic terminal S2. In a second state, the bidirectional switch 2 operates as a diode having an anode as the first ohmic terminal S1 and a cathode as the second ohmic terminal S2. In a third state, the bidirectional switch 2 is bidirectionally conductive with via a diode between the first and second ohmic terminals S1 and S2. In a fourth state, the bidirectional switch 2 cuts off a bidirectional current between the first and second ohmic terminals.

Abstract: A nitride semiconductor device includes a semiconductor layer stack including a first nitride semiconductor layer and a second nitride semiconductor layer stacked in this order on a substrate. A p-type third nitride semiconductor layer is selectively formed on the semiconductor layer stack, and a gate electrode is formed on the third nitride semiconductor layer. A first ohmic electrode and a second ohmic electrode are formed on regions of the semiconductor layer stack located at both sides of the third nitride semiconductor layer, respectively. A first gate electrode forms a Schottky contact with the third nitride semiconductor layer.

Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider band gap than the first nitride semiconductor layer; and a third nitride semiconductor layer formed on the second nitride semiconductor layer. A region of the third nitride semiconductor layer located below the gate electrode is formed with a control region having a p-type conductivity, and a region of the third nitride semiconductor layer located between the gate electrode and each of the source electrode and the drain electrode is formed with a high resistive region having a higher resistance than the that of the control region.

Abstract: A semiconductor device includes: a semiconductor chip; a protective film and an insulating film sequentially stacked over the semiconductor chip, and each having openings that expose source, drain, and gate pads; a heat dissipation terminal made of a material having a higher thermal conductivity than the insulating film; connection terminals formed on the source, drain, and gate pads and surrounded by the insulating film; and a mount substrate having connection pads. The semiconductor chip has a source electrode having a plurality of source fingers, a drain electrode having a plurality of drain fingers, and a gate electrode having a plurality of gate fingers. The source, drain, and gate pads are connected to the source electrode, the drain electrode, and the gate electrode, respectively. The connection terminals are respectively connected to the connection pads. The heat dissipation terminal is in close contact with the mount substrate.

Abstract: In a transistor, an AlN buffer layer 102, an undoped GaN layer 103, an undoped AlGaN layer 104, a p-type control layer 105, and a p-type contact layer 106 are formed in this order on a sapphire substrate 101. The transistor further includes a gate electrode 110 in ohmic contact with the p-type contact layer 106, and a source electrode 108 and a drain electrode 109 provided on the undoped AlGaN layer 104. By applying a positive voltage to the p-type control layer 105, holes are injected into a channel to increase a current flowing in the channel.

Abstract: A semiconductor device includes a semiconductor layer stack formed on a substrate, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor layer stack, and are spaced from each other, a first control layer formed between the first ohmic electrode and the second ohmic electrode, and a first gate electrode formed on the first control layer. The first control layer includes a lower layer, an intermediate layer which is formed on the lower layer, and has lower impurity concentration than the lower layer, and an upper layer which is formed on the intermediate layer, and has higher impurity concentration than the intermediate layer.

Abstract: According to a method for fabricating a semiconductor device, a first semiconductor layer made of a first nitride semiconductor is formed over a substrate. Thereafter, a mask film covering part of the upper surface of the first semiconductor layer is selectively formed on the first semiconductor layer. A multilayer film, in which second and third nitride semiconductors having different band gaps are stacked, is selectively formed on the first semiconductor layer with the mask film used as a formation mask. On the multilayer film, an ohmic electrode is formed.

Abstract: A semiconductor device according to the present invention is a semiconductor device which includes: a semiconductor element; a gate drive circuit; and a connection terminal unit, wherein the semiconductor element includes: a gate electrode pad; and first and second ohmic electrode pads, the connection terminal includes: a first ohmic electrode terminal connected to the first ohmic electrode pad; a second ohmic electrode terminal connected to the second ohmic electrode pad; a gate drive terminal connected to the first ohmic electrode pad; and a gate terminal connected to the gate electrode pad, an input terminal of the gate drive circuit is connected to the gate drive terminal, an output terminal of the gate drive circuit is connected to the gate terminal, and a potential of the first ohmic electrode pad corresponds to a reference potential of the gate drive circuit.

Abstract: A two-wire AC switch suppressing heat from a bidirectional switch element inside the switch is provided. The two-wire AC switch 100a connected between an AC power supply 101 and a load 102 includes: a bidirectional switch element 103 which flows passing current bi-directionally, selects whether to flow or block the current, is connected in series with the AC power supply 101 and the load 102 to form a closed-loop circuit, and is made of a group-III nitride semiconductor; a full-wave rectifier 104 performing full-wave rectification on power supplied from the AC power supply 101; a power supply circuit 105 smoothing a voltage after the full-wave rectification to generate DC power; a first gate drive circuit 107 and a second gate drive circuit 108 each outputting a control signal to the bidirectional switch element 103; and a control circuit 106 controlling the first and second gate drive circuits 107 and 108.