Abstract: An eddy current braking apparatus according to the invention comprises: a brake disk (2) connected to a rotary shaft (1); a plurality of permanent magnets (7) arranged so that magnetic pole surfaces are opposed to the brake disk (2); and a drive mechanism for moving the permanent magnets (7) toward and away from the brake disk (2). Preferably, it further comprises a guide sleeve (3) supported by a nonrotatable structural section not connected to the rotary shaft (1), which receives a support ring (4) supporting the permanent magnets (7) and is arranged facing to the brake disk (2). Moreover, in the guide sleeve (3), there are provided ferromagnetic members (8) positioned opposite to the brake disk (2). Alternatively, the whole of said guide sleeve (3) including an end face opposed to said permanent magnets (7) is constructed of nonmagnetic material.

Abstract: A single row rotating-type eddy current braking apparatus for use with a rotor mounted on a powered shaft comprises a support ring, a plurality of magnets, a plurality of ferromagnetic switching plates, and a support body. The switching plates or magnets are capable of rotating with respect to each other to effect braking. The dimensions of the switching plates and angular displacement of the magnets and switching plates are controlled to minimize drag torque when in a non-braking state. The switching plates can be made to rotate and the bearing can be employed in combination with the rotating and stationary components to alleviate problems such as thermal expansion and wear. The apparatus also utilizes a pneumatic cylinder designed to rotate in the direction of the shaft rotation to achieve a braking state, and can employ a single rod double acting cylinder to switch between braking and non-braking states.

Abstract: A single row rotating-type eddy current braking apparatus for use with a rotor mounted on a powered shaft comprises a support ring, a plurality of magnets, a plurality of ferromagnetic switching plates, and a support body. The switching plates or magnets are capable of rotating with respect to each other to effect braking. The dimensions of the switching plates and angular displacement of the magnets and switching plates are controlled to minimize drag torque when in a non-braking state. The switching plates can be made to rotate and the bearing can be employed in combination with the rotating and stationary components to alleviate problems such as thermal expansion and wear. The apparatus also utilizes a pneumatic cylinder designed to rotate in the direction of the shaft rotation to achieve a braking state, and can employ a single rod double acting cylinder to switch between braking and non-braking states.

Abstract: To provide a D/A conversion apparatus that can minimize the increase in the amount of circuitry if the number of output levels is increased, a digital input value, input for each sampling clock, is first converted by a digital filter and a noise shaper into a word length limited digital signal with a high sampling frequency. The output of the noise shaper is mapped by a decoder to n m-valued signals a “1” at a time in a cyclic fashion progressing from one signal to the next so that the sum of the n m-valued signals becomes equal to the digital input value; thereafter, the n m-valued signals are converted by n m-valued D/A converters into corresponding analog signals which are then summed together by an analog adder to produce an analog output signal.

Abstract: A digital/analog conversion apparatus not causing harmonic distortion at the outputs of a row of 1-bit digital/analog converters and capable of effectively suppressing occurrence of harmonic distortion because of variations among the outputs of the 1-bit digital/analog converters, being configured as described below. More specifically, first, a digital input is converted into a digital signal having p values at a sampling frequency raised by a digital filter and a noise shaper. A decoder assigns the output of the noise shaper to a row of (p−1) 1-bit signals so that the position of value “1” is circulated, and designates the position of an inhibit bit in the row of 1-bit signals. When the assignment of value “1” is circulated to the inhibit bit position, the assignment advances to avoid the inhibit bit, and the position of the inhibit bit is moved so as to be circulated to the next bit.

Abstract: It purposes to provide a D/A conversion apparatus of a high accuracy oversampling method by noise shaping which is not needed a high frequency clock or accurate working, and a high accuracy A/D conversion apparatus having a configuration to which said D/A conversion technology is applied. It has configuration outputting the digital signal by dividing to plural 1-bit D/A converters, and by using said D/A converters so as to circulate, correlation of the signal and the output value of a specified 1-bit D/A converter is canceled, and noise or distortion due to a relative error of the 1-bit D/A converter is reduced.

Abstract: An offset reducer includes an adder for adding an input signal and an offset cancel signal to reduce an offset component of the input signal. A converter serves to measure a difference between a sum of past periods during which an output signal of the adder was positive and a sum of past periods during which the output signal of the adder was negative. The converter outputs an offset detection signal of a given value which depends on a sign of the measured difference when an absolute value of the measured difference exceeds a given difference. The converter initializes the measured difference to a given initial difference when the offset detection signal is outputted. An integrator serves to accumulate the offset detection signal outputted from the converter. The integrator generates the offset cancel signal in accordance with a result of the accumulating the offset detection signal. The output signal of the adder constitutes an offset-free signal corresponding to the input signal.

Abstract: A noise shaping quantization D/A converter in which an input digital signal is supplied to a single-integration sigma delta modulation circuit having quantization levels which include zero level, with a quantization error signal from the single-integration circuit being supplied to a double-integration noise shaping quantization circuit having quantization levels which also include zero level, and an output signal from the double-integration circuit being differentiated and summed with the single-integration circuit output to obtain a bit-compressed digital signal for D/A conversion. Offset of the analog output signal during a zero hold status of the input digital signal is eliminated, and increased efficiency of supply voltage utilization is attained, together with increased S/N ratio.

Abstract: A first analog input signal is converted into a plurality of second analog signals having different levels respectively. The second analog signals are inputted into respective analog-to-digital converters. Values of output signals from the respective converters are adjusted in accordance with the values of the output signals from the respective converters to convert the output signals from the respective converters into respective adjusted signals. One of the adjusted signals is selected in accordance with the values of the output signals from the respective converters. The selected signal is produced as a system output signal.