Abstract: A GaAs crystal (35) has ?x(1) not greater than 20 cm?1 in an expression 1 ? ? ? x ? ( 1 ) = ? i = 1 s ? ? X i - X BL ? s Expression ? ? 1 where xi represents a Raman shift of a first peak attributed to oscillation of a longitudinal optical phonon of GaAs in a Raman spectrum measured at an ith point in measurement of Raman spectra at s points in a (100) plane, xBL represents a Raman shift of an emission line peak of neon, and i and s are each a natural number greater than 0.

Abstract: A GaAs crystal (35) has ?x(1) not greater than 20 cm?1 in an expression 1 ? ? ? x ? ( 1 ) = ? i = 1 s ? ? X i - X BL ? s Expression ? ? 1 where xi represents a Raman shift of a first peak attributed to oscillation of a longitudinal optical phonon of GaAs in a Raman spectrum measured at an ith point in measurement of Raman spectra at s points in a (100) plane, xBL represents a Raman shift of an emission line peak of neon, and i and s are each a natural number greater than 0.

Abstract: A GaAs crystal has ?x(1) not greater than 20 cm?1 in an expression 1 ? ? ? x ? ( 1 ) = ? i = 1 s ? ? x i - x BL ? ? s Expression ? ? 1 where xi represents a Raman shift of a first peak attributed to oscillation of a longitudinal optical phonon of GaAs in a Raman spectrum measured at an ith point in measurement of Raman spectra at s points in a (100) plane, xBL represents a Raman shift of an emission line peak of neon, and i and s are each a natural number greater than 0.

Abstract: A GaAs crystal has ?x(1) not greater than 20 cm?1 in an expression 1 ? ? ? x ? ( 1 ) = ? i = 1 s ? ? x i - x BL ? ? s Expression ? ? 1 where xi represents a Raman shift of a first peak attributed to oscillation of a longitudinal optical phonon of GaAs in a Raman spectrum measured at an ith point in measurement of Raman spectra at s points in a (100) plane, xBL represents a Raman shift of an emission line peak of neon, and i and s are each a natural number greater than 0.

Abstract: On a p? epitaxial layer, an n-type epitaxial layer and a gate region are formed in this order. A gate electrode is electrically connected to the gate region, and a source electrode and a drain electrode are spaced apart from each other with the gate electrode sandwiched therebetween. A control electrode is used for applying to the p? epitaxial layer a voltage that causes a reverse biased state of the p? epitaxial layer and the n-type epitaxial layer in an OFF operation.

Abstract: The invention offers a method of producing a semiconductor device that can suppress the worsening of the property due to surface roughening of a wafer by sufficiently suppressing the surface roughening of the wafer in the heat treatment step and a semiconductor device in which the worsening of the property caused by the surface roughening is suppressed. The method of producing a MOSFET as a semiconductor device is provided with a step of preparing a wafer 3 made of silicon carbide and an activation annealing step that performs activation annealing by heating the wafer 3. In the activation annealing step, the wafer 3 is heated in an atmosphere containing a vapor of silicon carbide generated from the SiC piece 61, which is a generating source other than the wafer 3.

Abstract: A JFET is a semiconductor device allowing more reliable implementation of the characteristics essentially achievable by employing SiC as a material and includes a wafer having at least an upper surface made of silicon carbide, and a gate contact electrode formed on the upper surface. The wafer includes a first p-type region serving as an ion implantation region formed so as to include the upper surface. The first p-type region includes a base region disposed so as to include the upper surface, and a protruding region. The base region has a width (w1) in the direction along the upper surface greater than a width (w2) of the protruding region. The gate contact electrode is disposed in contact with the first p-type region such that the gate contact electrode is entirely located on the first p-type region as seen in plan view.

Abstract: There is provided a method for manufacturing a SiC semiconductor device achieving improved performance. The method for manufacturing the SiC semiconductor device includes the following steps. That is, a SiC semiconductor is prepared which has a first surface having at least a portion into which impurities are implanted. By cleaning the first surface of the SiC semiconductor, a second surface is formed. On the second surface, a Si-containing film is formed. By oxidizing the Si-containing film, an oxide film constituting the SiC semiconductor device is formed.

Abstract: A silicon carbide substrate has a first layer facing a semiconductor layer and a second layer stacked on the first layer. Dislocation density of the second layer is higher than dislocation density of the first layer. Thus, quantum efficiency and power efficiency of a light-emitting device can both be high.

Abstract: At least one single crystal substrate, each having a backside surface and made of silicon carbide, and a supporting portion having a main surface and made of silicon carbide, are prepared. In this preparing step, at least one of the backside surface and main surface is formed by machining. By this forming step, a surface layer having distortion in the crystal structure is formed on at least one of the backside surface and main surface. The surface layer is removed at least partially. Following this removing step, the backside surface and main surface are connected to each other.

Abstract: A connected substrate having a supporting portion and first and second silicon carbide substrates is prepared. The first silicon carbide substrate has a first backside surface connected to the supporting portion, a first front-side surface, and a first side surface connecting the first backside surface and the first front-side surface to each other. The second silicon carbide substrate has a second backside surface connected to the supporting portion, a second front-side surface, and a second side surface connecting the second backside surface and the second front-side surface to each other and forming a gap between the first side surface and the second side surface. A filling portion for filling the gap is formed. Then, the first and second front-side surfaces are polished. Then, the filling portion is removed. Then, a closing portion for closing the gap is formed.

Abstract: A first vertex of a first single-crystal silicon carbide substrate and a second vertex of a second single-crystal silicon carbide substrate abut each other such that a first side of the first single-crystal silicon carbide substrate and a second side of the second single-crystal silicon carbide substrate are aligned. In addition, at least a part of the first side and at least a part of the second side abut on a third side of a third single-crystal silicon carbide substrate. Thus, in manufacturing a semiconductor device including a composite substrate, process fluctuations caused by a gap between the single-crystal silicon carbide substrates can be suppressed.

Abstract: A method of fabricating a SiC semiconductor device includes the steps of preparing a silicon carbide semiconductor including a first surface having impurities implanted at least partially, forming a second surface by dry etching the first surface of the silicon carbide semiconductor using gas including hydrogen gas, and forming an oxide film constituting the silicon carbide semiconductor device on the second surface.

Abstract: There is provided a method for manufacturing a SiC semiconductor device achieving improved performance. The method for manufacturing the SiC semiconductor device includes the following steps. That is, a SiC semiconductor is prepared which has a first surface having at least a portion into which impurities are implanted. By cleaning the first surface of the SiC semiconductor, a second surface is formed. On the second surface, a Si-containing film is formed. By oxidizing the Si-containing film, an oxide film constituting the SiC semiconductor device is formed.

Abstract: A step of preparing a stack is performed to position each single-crystal substrate in a first single-crystal substrate group and a first base substrate face to face with each other, position each single-crystal substrate in a second single-crystal substrate group and a second base substrate face to face with each other, and stack the first single-crystal substrate group, the first base substrate, an insertion portion, the second single-crystal substrate group, and the second base substrate in one direction in this order. Next, the stack is heated so as to allow a temperature of the stack to reach a temperature at which silicon carbide can sublime and so as to form a temperature gradient in the stack with the temperature thereof getting increased in the above-described direction. In this way, silicon carbide substrates can be manufactured efficiently.

Abstract: A first silicon carbide substrate has a first backside surface connected to a supporting portion, a first front-side surface opposite to the first backside surface, and a first side surface connecting the first backside surface and the first front-side surface to each other. A second silicon carbide substrate has a second backside surface connected to the supporting portion, a second front-side surface opposite to the second backside surface, and a second side surface connecting the second backside surface and the second front-side surface to each other and forming a gap between the first side surface and the second side surface. A closing portion closes the gap. Thereby, foreign matters can be prevented from remaining in a gap between a plurality of silicon carbide substrates provided in a combined substrate.

Abstract: A silicon carbide substrate, which achieves restrained warpage even when a different-type material layer made of a material other than silicon carbide, includes: a base layer made of silicon carbide; and a plurality of SiC layers arranged side by side on the base layer when viewed in a planar view and each made of single-crystal silicon carbide. A gap is formed between end surfaces of adjacent SiC layers.

Abstract: A method for manufacturing a silicon carbide substrate achieves reduced manufacturing cost. The method includes the steps of: preparing a base substrate and a SiC substrate; fabricating a stacked substrate by stacking the base substrate and the SiC substrate; fabricating a connected substrate by heating the stacked substrate; transferring a void, formed at a connection interface, in a thickness direction of the connected substrate by heating the connected substrate to cause the base substrate to have a temperature higher than that of the SiC substrate; and removing the void by removing a region including a main surface of the base substrate opposite to the SiC substrate.

Abstract: The present invention provides a silicon carbide substrate, an epitaxial layer provided substrate, a semiconductor device, and a method for manufacturing the silicon carbide substrate, each of which achieves reduced on-resistance. The silicon carbide substrate is a silicon carbide substrate having a main surface, and includes: a SiC single-crystal substrate formed in at least a portion of the main surface; and a base member disposed to surround the SiC single-crystal substrate. The base member includes a boundary region and a base region. The boundary region is adjacent to the SiC single-crystal substrate in a direction along the main surface, and has a crystal grain boundary therein. The base region is adjacent to the SiC single-crystal substrate in a direction perpendicular to the main surface, and has an impurity concentration higher than that of the SiC single-crystal substrate.

Abstract: A first silicon carbide substrate having a first back-side surface and a second silicon carbide substrate having a second back-side surface are prepared. The first and second silicon carbide substrates are placed so as to expose each of the first and second back-side surfaces in one direction. A connecting portion is formed to connect the first and second back-side surfaces to each other. The step of forming the connecting portion includes a step of forming a growth layer made of silicon carbide on each of the first and second back-side surfaces, using a sublimation method of supplying a sublimate thereto in the one direction.