Abstract: Via-shaped copper interconnect lines (2) buried in an interlayer insulating film (8) are connected to gate interconnect lines (1) in the lowermost layer. A copper interconnect line (6) of a shield ring (5) is buried in the interlayer insulating film (8), closer to outside than the copper interconnect lines (2). A silicon nitride film (9) is provided on the via-shaped copper interconnect lines (2), on the copper interconnect line (6) of the shield ring (5), and on the interlayer insulating film (8). Provided on the silicon nitride film (9) is a silicon oxide film (10) which holds therein a fuse line (3) for connecting different ones of copper interconnect lines (2). The silicon oxide film (10) is also provided on the upper surfaces of the fuse line (3) and the aluminum interconnect line (7). A silicon nitride film (11) is provided on the silicon oxide film (10). The silicon nitride film (11) defined over the fuse line (3) is removed, thereby creating an opening (4).

Abstract: An electric drive control apparatus which prevents the voltage from being saturated and does not cause the driver to feel uncomfortable during driving.

Abstract: A semiconductor substrate that prevents formation of particles from an edge part of the substrate. The substrate contains an on-substrate oxide film and an SOI layer stacked on the oxide film. A molten layer is formed on the edge part of the on-substrate oxide film and the SOI layer by mixing the SOI layer and the on-substrate oxide film to cover the edge part. An epitaxial layer may also be formed on the edge part of the on-substrate oxide film and the SOI layer to cover the edge part.

Abstract: An electric drive control apparatus for an electric machine, includes a controller that computes an instruction value based on an electric machine rotational speed and a target electric machine torque that represents a target value of an electric machine torque, generates a drive signal based on the instruction value, computes a voltage saturation variable that represents a likelihood of an occurrence of a voltage saturation, determines whether a switch condition for switching a control between an asynchronous PWM control and a synchronous PWM control is met based on the voltage saturation variable, and selects and outputs the drive signal and switches the control between the asynchronous PWM control and the synchronous PWM control based on a determination as to the switch condition.

Abstract: An acceleration sensor includes an acceleration sensor element and a frame portion surrounding the element. The sensor element and the frame portion are located on a major surface of a substrate. An intermediate layer is formed on the frame portion. A cap portion is bonded to the intermediate layer, thereby sealing-off the acceleration sensor element. Grooves in the form of a frame are provided in the frame portion and the intermediate layer, respectively, and located at positions generally identical to each other with regard to the major surface direction of the substrate.

Abstract: Provided is a method of manufacturing an acceleration sensor capable of preventing bonding of a movable electrode and a fixed electrode. A stain film 8 for reducing bonding adsorption force is formed on side surfaces of a movable electrode 1, fixed electrodes 2a and 2b and a frame portion 7. In the case in which the movable electrode 1 and the fixed electrodes 2a and 2b are to be formed of a silicon substrate, it is preferable that an insulating film having irregular bonding of silicon atoms and oxygen atoms and irregular bonding of silicon atoms and nitrogen atoms should be employed for the stain film 8, for example. The formation of the stain film 8 can suppress the bonding between the movable electrode 1 and the fixed electrodes 2a and 2b even if Coulomb force is generated between both electrodes when the silicon substrate and a back side substrate 4 are joined by using an anode junction method.

Abstract: An electric drive apparatus has an electric motor having a rotor and a stator; and a magnetic pole position detecting portion having a sensor rotor attached to the rotor, and a sensor stator that is adjacent to the stator, and that is fixed to a case, and that extends over a partial region of the sensor rotor extending in a circumferential direction. Because the sensor rotor of the magnetic pole position detecting portion is attached to the rotor and the sensor stator is adjacent to the stator and is fixed to the case, it is no longer necessary to use an all-round embracing type magnetic pole position detecting portion that embraces the entire shaft of an electric machine.

Abstract: A motor has a rotatably supported rotor core and permanent magnets disposed at equal intervals at a plurality of positions in a circumferential direction of the rotor core. The rotor core has projecting poles formed at equal intervals at a center between each permanent magnet. Furthermore, an opening angle center line of each projecting pole conforms to a center line of an angle created by each opening angle center line of two adjacent permanent magnets. Additionally, each projecting pole is shaped asymmetrical to a line connecting a center of the projecting pole in the rotational direction of the rotor core and an axis center of the rotor core.

Abstract: Via-shaped copper interconnect lines (2) buried in an interlayer insulating film (8) are connected to gate interconnect lines (1) in the lowermost layer. A copper interconnect line (6) of a shield ring (5) is buried in the interlayer insulating film (8), closer to outside than the copper interconnect lines (2). A silicon nitride film (9) is provided on the via-shaped copper interconnect lines (2), on the copper interconnect line (6) of the shield ring (5), and on the interlayer insulating film (8). Provided on the silicon nitride film (9) is a silicon oxide film (10) which holds therein a fuse line (3) for connecting different ones of copper interconnect lines (2). The silicon oxide film (10) is also provided on the upper surfaces of the fuse line (3) and the aluminum interconnect line (7). A silicon nitride film (11) is provided on the silicon oxide film (10). The silicon nitride film (11) defined over the fuse line (3) is removed, thereby creating an opening (4).

Abstract: A sidewall oxide layer and a sidewall insulation layer are formed to cover the edge portion of an SOI layer. A channel stopper region is formed in the vicinity of the edge portion of the SOI layer. A protruded insulation layer is formed on the channel stopper region. A gate electrode extends from a region over the SOI layer to the protruded insulation layer and the sidewall insulation layer. In this way, reduction in threshold voltage Vth of a parasitic MOS transistor at the edge portion of the SOI layer can be suppressed.

Abstract: In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration of an electric field at the upper side portion of the semiconductor layer can be prevented. As a result, lowering of a threshold voltage of a parasitic transistor can be prevented, so that the parasitic transistor does not adversely affect subthreshold characteristics of a regular transistor. Owing to provision of a concavity of a U-shaped section, generation of etching residue can be prevented when etching a gate electrode for patterning the same. Thereby, a disadvantage is not caused in connection with the manufacturing process.

Abstract: According to a semiconductor device of the present invention, a field oxide film is formed so as to cover the main surface of an SOI layer and to reach the main surface of a buried oxide film. As a result, a pMOS active region of the SOI and an nMOS active region of the SOI can be electrically isolated completely. Therefore, latchup can be prevented completely. As a result, it is possible to provide a semiconductor device using an SOI substrate which can implement high integration by eliminating reduction of the breakdown voltage between source and drain, which was a problem of a conventional SOI field effect transistor, as well as by efficiently disposing a body contact region, which hampers high integration, and a method of manufacturing the same.

Abstract: A vehicle drive control apparatus including a motor, a battery, an inverter having a direct current supplied from the battery, wherein the inverter converts the direct current into an alternating current and supplies the alternating current to the motor and a controller that transmits a drive signal to the inverter so as to execute a weak field control, wherein a charging current supplied to the battery, at a time when execution of the weak field control is not allowed, is set to be smaller than an overcharging current indicating a maximum value of an electric current charged in the battery.

Abstract: To improve the radiation property without inhibiting miniaturization of the device, heat generated at a heat generating layer (5) is radiated to a substrate (1) via plugs (7, 17), wiring layers (8, 18), and plugs (9, 19). A cross sectional along the principal plane of the substrate (1) of the plugs (7, 9, 17, 19) is set to be a rectangle, and the long sides of the rectangle are parallel to the direction perpendicular to the direction connecting one end and the other end of the heat generating layer (5). Between the plugs (9, 19) and the semiconductor layer (2) is interposed n-type semiconductor layers (3, 13).

Abstract: In manufacturing hermetically sealed semiconductor devices, a plurality of generally rectangular openings are first formed into a matrix pattern in a cap silicon wafer so that the plurality of generally rectangular openings are separated by a plurality of row segments extending in a first direction and a plurality of column segments extending in a second direction perpendicular to the first direction. On the other hand, a plurality of semiconductor elements each having a plurality of electrode portions are bonded to a semiconductor wafer. After each of the plurality of generally rectangular openings has been aligned with the plurality of electrode portions of at least one of the plurality of semiconductor elements, the cap wafer is bonded to the plurality of semiconductor elements.

Abstract: According to a semiconductor device of the present invention, a field oxide film is formed so as to cover the main surface of an SOI layer and to reach the main surface of a buried oxide film. As a result, a pMOS active region of the SOI and an nMOS active region of the SOI can be electrically isolated completely. Therefore, latchup can be prevented completely. As a result, it is possible to provide a semiconductor device using an SOI substrate which can implement high integration by eliminating reduction of the breakdown voltage between source and drain, which was a problem of a conventional SOI field effect transistor, as well as by efficiently disposing a body contact region, which hampers high integration, and a method of manufacturing the same.

Abstract: A semiconductor chip is fixed on the main surface of a semiconductor substrate by establishing negative pressure compared to a atmospheric pressure, in a space between the chip and substrate.

Abstract: A voltage applying section (32) is connected to a silicon substrate (1). Emission of radiation to a semiconductor device causes a large number of holes to accumulate within a BOX layer (2) in the vicinity of the interface with respect to a silicon layer (3). The amount of accumulation of holes increases with a lapse of time. A voltage applying section (32) applies a negative voltage which decreases with the lapse of time to the silicon substrate (1) in order to cancel out a positive electric field resulting from the accumulated holes. The voltage applying section (32) includes a time counter (30) for detecting the lapse of time and a voltage generating section (31) connected to the silicon substrate (1) for generating a negative voltage (V1) which decreases in proportion to the lapse of time based on the result of detection (time T) carried out by the time counter (30). Consequently, a semiconductor device capable of suppressing occurrence of total dose effects is obtained.

Abstract: A sealing material in a plate form is placed on a frame wherein a recess is provided. A semiconductor chip and the frame are overlapped via the sealing material in a plate form within a thermostatic chamber of which the temperature is higher than the temperature at the time of the sealing of the semiconductor chip and the frame in a resin. After that, the semiconductor chip and the frame, which overlap each other, are taken out of the thermostatic chamber so as to be cooled down in the atmosphere. After that, they are sealed in a molding resin. The semiconductor chip is secured to the frame due to the differential pressure (negative pressure) between the pressure within the airtight space and atmospheric pressure. Thereby, a resin mold semiconductor device is gained wherein a semiconductor chip is secured to a frame without using a die bonding material.

Abstract: To provide a semiconductor device capable of preventing drawbacks from being caused by metal pollution and a method of manufacturing the semiconductor device. A region (NR) and a region (PR) are defined by a trench isolation oxide film (ST21), a polysilicon film (PS21) is selectively provided on the trench isolation oxide film (ST21), a silicon layer (S22) is provided on the polysilicon film (PS21), and a side wall spacer (SW2) is provided on a side surface of the polysilicon film (PS21). The polysilicon film (PS21) is provided in a position corresponding to a top of a PN junction portion JP of a P-type well region (WR11) and an N-type well region (WR12) in an SOI layer 3 across the two well regions.