Patents by Inventor Yasushi Miyasaka

Yasushi Miyasaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9018633
    Abstract: A semiconductor device includes an active region in which current flows when the semiconductor device is in an on state and a breakdown voltage structure portion which surrounds the active region. In the active region, a MOS gate structure includes, a p well region, an n+ source region, a gate electrode, and a source electrode is provided on the front surface of a semiconductor substrate. A drain electrode which comes into contact with an n? drift region is provided from the rear surface to the side surface of the semiconductor substrate. The drain electrode forms a Schottky contact with the n? drift region which is the semiconductor substrate. In the breakdown voltage structure portion, a leakage current reducing layer reduces leakage current from the outer circumferential edge of the semiconductor substrate and is provided at least at the outer circumferential edge of the semiconductor substrate.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: April 28, 2015
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Hiroki Wakimoto, Haruo Nakazawa, Yasushi Miyasaka
  • Publication number: 20140061672
    Abstract: A semiconductor device includes an active region in which current flows when the semiconductor device is in an on state and a breakdown voltage structure portion which surrounds the active region. In the active region, a MOS gate structure includes, a p well region, an n+ source region, a gate electrode, and a source electrode is provided on the front surface of a semiconductor substrate. A drain electrode which comes into contact with an n? drift region is provided from the rear surface to the side surface of the semiconductor substrate. The drain electrode forms a Schottky contact with the n? drift region which is the semiconductor substrate. In the breakdown voltage structure portion, a leakage current reducing layer reduces leakage current from the outer circumferential edge of the semiconductor substrate and is provided at least at the outer circumferential edge of the semiconductor substrate.
    Type: Application
    Filed: August 12, 2013
    Publication date: March 6, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki WAKIMOTO, Haruo NAKAZAWA, Yasushi MIYASAKA
  • Patent number: 7507023
    Abstract: A temperature measurement device of a power semiconductor device includes a plurality of temperature detecting diodes formed on a first chip having a power semiconductor device; and a detection circuit that is formed on a second chip having an integrated circuit that controls the power semiconductor device and is connected to the temperature detecting diodes; wherein the detection circuit detects a temperature of the power semiconductor device based on a difference between the forward voltages of the temperature detecting diodes when different values of current flow to the respective temperature detecting diodes.
    Type: Grant
    Filed: April 14, 2006
    Date of Patent: March 24, 2009
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Kazunori Oyabe, Tomoyuki Yamazaki, Yasushi Miyasaka
  • Patent number: 7282781
    Abstract: A semiconductor device has an n?-semiconductor layer and p+-diffusion regions each having a depth of 14 to 20 ?m (design value) selectively formed in the n? semiconductor layer. With the entire surface of the chip irradiated with light ions, such as He ions, a lifetime killer is introduced from a position d2 shallower than a position d1 of a p-n junction surface, formed from the n?-semiconductor layer and the p+-diffusion regions, to a position d3 deeper than the position d1 to form a short-lifetime region over the entire chip. The irradiation is carried out so that the light ion irradiation half width is not more than the depth of the p+-diffusion regions and a position of a peak of the light ions becomes deeper than the light ion irradiation half width and within the range between 80% and 120% of the depth of the p+-diffusion regions.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: October 16, 2007
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Toshiyuki Matsui, Yasuyuki Hoshi, Yasuyuki Kobayashi, Yasushi Miyasaka
  • Patent number: 7276771
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: October 2, 2007
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Patent number: 7187054
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: March 6, 2007
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Publication number: 20060255361
    Abstract: A temperature measurement device of a power semiconductor device includes a plurality of temperature detecting diodes formed on a first chip having a power semiconductor device; and a detection circuit that is formed on a second chip having an integrated circuit that controls the power semiconductor device and is connected to the temperature detecting diodes; wherein the detection circuit detects a temperature of the power semiconductor device based on a difference between the forward voltages of the temperature detecting diodes when different values of current flow to the respective temperature detecting diodes.
    Type: Application
    Filed: April 14, 2006
    Publication date: November 16, 2006
    Inventors: Kazunori Oyabe, Tomoyuki Yamazaki, Yasushi Miyasaka
  • Publication number: 20060244006
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Application
    Filed: June 23, 2006
    Publication date: November 2, 2006
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Patent number: 7112865
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: September 26, 2006
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Patent number: 6975013
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: December 13, 2005
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Publication number: 20050263842
    Abstract: A semiconductor device has an n?-semiconductor layer and p+-diffusion regions each having a depth of 14 to 20 ?m (design value) selectively formed in the n? semiconductor layer. With the entire surface of the chip irradiated with light ions, such as He ions, a lifetime killer is introduced from a position d2 shallower than a position d1 of a p-n junction surface, formed from the n?-semiconductor layer and the p+-diffusion regions, to a position d3 deeper than the position d1 to form a short-lifetime region over the entire chip. The irradiation is carried out so that the light ion irradiation half width is not more than the depth of the p+-diffusion regions and a position of a peak of the light ions becomes deeper than the light ion irradiation half width and within the range between 80% and 120% of the depth of the p+-diffusion regions.
    Type: Application
    Filed: March 15, 2005
    Publication date: December 1, 2005
    Applicant: Fuji Electric Device
    Inventors: Toshiyuki Matsui, Yasuyuki Hoshi, Yasuyuki Kobayashi, Yasushi Miyasaka
  • Publication number: 20050179105
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Application
    Filed: March 3, 2005
    Publication date: August 18, 2005
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Publication number: 20050151219
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least {fraction (1/100)} of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Application
    Filed: March 4, 2005
    Publication date: July 14, 2005
    Applicant: Fuji Electric Holdings Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Patent number: 6815766
    Abstract: A semiconductor device has an alternating conductivity type layer that improves the tradeoff relation between the ON-resistance and the breakdown voltage and a method of manufacturing such a semiconductor device. The alternating conductivity type layer is formed of n-type drift regions and p-type partition regions alternately arranged with each other. At least the n-type drift regions or p-type partition regions are formed by ion implantation under an acceleration voltage changed continuously. The p-type partition regions or n-type drift regions are formed by epitaxial growth or by diffusing impurities from the surface of a substrate or a layer for the layer.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: November 9, 2004
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yasushi Miyasaka, Tatsuhiko Fujihira
  • Patent number: 6787420
    Abstract: This invention clarifies the effects of parameters and enables the mass production of a super-junction semiconductor device, which has a drift layer composed of a parallel pn layer that conducts electricity in the ON state and is depleted in the OFF state. The quantity of impurities in n drift regions is within the range between 100% and 150% or between 110% and 150% of the quantity of impurities in p partition regions. The impurity density of either one of the n drift regions and the p partition regions is within the range between 92% and 108% of the impurity density of the other regions. In addition, the width of either one of the n drift regions and the p partition regions is within the range between 94% and 106% of the width of the other regions.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: September 7, 2004
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yasushi Miyasaka, Tatsuhiko Fujihira, Yasuhiko Ohnishi, Katsunori Ueno, Susumu Iwamoto
  • Patent number: 6677626
    Abstract: This invention achieves a high inverse voltage of a super-junction semiconductor device, which has a drift layer composed of a parallel pn layer that conducts electricity in the ON state and is depleted in the OFF state. An n− high resistance region is formed at the periphery of a drift layer composed of a parallel pn layer of n drift regions and p partition regions. The impurity density ND of the n− high resistance region is 5.62×1017×VDSS−1.36(cm−3) or less. VDSS denotes the withstand voltage (V). An n low resistance region is arranged adjacent to the n− high resistance region.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: January 13, 2004
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Youichi Shindou, Yasushi Miyasaka, Tatsuhiko Fujihira, Manabu Takei
  • Patent number: 6673679
    Abstract: A semiconductor device has an alternating conductivity type layer that improves the tradeoff relation between the ON-resistance and the breakdown voltage and a method of manufacturing such a semiconductor device. The alternating conductivity type layer is formed of n-type drift regions and p-type partition regions alternately arranged with each other. At least the n-type drift regions or p-type partition regions are formed by ion implantation under an acceleration voltage changed continuously. The p-type partition regions or n-type drift regions are formed by epitaxial growth or by diffusing impurities from the surface of a substrate or a layer for the layer.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: January 6, 2004
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yasushi Miyasaka, Tatsuhiko Fujihira
  • Publication number: 20030207536
    Abstract: To provide a semiconductor device with an alternating conductivity type layer that facilitates improves the tradeoff relation between the ON-resistance and the breakdown voltage and increasing the current capacity by reducing the ON-resistance while maintaining the high breakdown voltage, and to provide a method of manufacturing the semiconductor device with an alternating conductivity type layer easily and with excellent mass productivity. The semiconductor device according to the invention includes an alternating conductivity type layer that provides a current path in the ON-state of the device and is depleted in the OFF-state of the device. The alternating conductivity type layer is formed of n-type drift regions and p-type partition regions alternately arranged with each other. At least, n-type drift regions or p-type partition regions are formed by ion implantation under an acceleration voltage changed continuously.
    Type: Application
    Filed: April 21, 2003
    Publication date: November 6, 2003
    Applicant: Fuji Electric, Co., Ltd.
    Inventors: Yasushi Miyasaka, Tatsuhiko Fujihira
  • Publication number: 20030030120
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least {fraction (1/100)} of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Application
    Filed: October 2, 2002
    Publication date: February 13, 2003
    Applicant: Fuji Electric Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
  • Patent number: 6383836
    Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least {fraction (1/100)} of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: May 7, 2002
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka