Patents by Inventor Yasushi Nagai

Yasushi Nagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090113087
    Abstract: There are provided a stream I/F section 7 adapted to exclusively input/output stream data such as video data or audio data from/to a host section, a non-stream I/F section 5 adapted to input/output non-stream data such as an address, a command, photo data, or text data from/to the host section 3, and a recording medium I/F section 11 adapted to input/output the stream data and the non-stream data to/from a recording medium section 4, and the stream I/F section 7 is provided with transfer control means for controlling the transfer rate of the stream data in accordance with a state of use (availability) of each of a receiving buffer 6 and a transmission buffer 8 provided independently.
    Type: Application
    Filed: October 31, 2008
    Publication date: April 30, 2009
    Inventors: Nobuaki Kohinata, Yasushi Nagai, Takeshi Asahi, Shigeki Taira, Keitaro Okasaki, Yuichi Kobayashi
  • Publication number: 20080294913
    Abstract: Provided is a disk array controller capable of speeding up the processing by simultaneously execution the encryption/decryption of a non parallel block cipher modes of operation. In a disk array controller for controlling a disk array according to a disk access request from a host system, a plurality of non parallel mode encryption/decryption target data are divided into a plurality of messages unrelated to the encryption/decryption processing, partitioning non parallel mode encryption/decryption target data belonging to the respective messages into a plurality of block data, storing each block data belonging to the respective messages by allocating it each line of Rnd[0] to Rnd[R?1] per message, and encrypting/decrypting block data corresponding to block data corresponding to a cell of the same column of each line among the block data stored in a data buffer simultaneously with the pipeline processing performed by a pipeline encryption/decryption circuit.
    Type: Application
    Filed: January 15, 2008
    Publication date: November 27, 2008
    Inventors: Hiroshi NAKAGOE, Toru Owada, Yasushi Nagai
  • Publication number: 20080215769
    Abstract: An operational circuit for performing an operation of an arbitrary number of input data pieces by using a DMA transfer according to a descriptor control and output results. The arbitrary number of input data pieces are divided into a plurality of pieces to perform an operation processing without performing the operation of the arbitrary number of input data pieces at a time. The operational circuit once stores an intermediate result for each of the divided operations in an external storage device, performs an operation processing read with an intermediate result in the next operation processing, and obtains a final result by repeating these operation processings. The operation is performed at a cyclic unit of processing corresponding to the number of address registers provided in the operational circuit.
    Type: Application
    Filed: November 16, 2007
    Publication date: September 4, 2008
    Inventors: Hiroshi Nakagoe, Yasushi Nagai
  • Publication number: 20080065885
    Abstract: In the configuration performing a data processing by a hardware processing circuit (accelerator), to provide a technology capable of improving a poorness of processing efficiency by multiple accesses to the data, the following solving means are provided. A network data processing accelerator of the present network data processing apparatus comprises processing units corresponding to each processing of an encryption/decryption, a message authentication, and a checksum, and in the data processing including a combination of each processing, accesses for the same data of the memory and the like through a bus I/F unit and the like is collected together into one time, and a pipeline processing is performed using the least common multiple of the data processing unit of each processing.
    Type: Application
    Filed: July 18, 2007
    Publication date: March 13, 2008
    Inventors: YASUSHI NAGAI, Hiroshi Nakagoe, Shigeki Taira
  • Patent number: 6994102
    Abstract: A pressure regulating valve which is comprised of a valve body being comprised of a cylinder, a spool slidably disposed in the cylinder with a clearance, the spool and the cylinder defining a pressure chamber and a space portion, and an urging member which urges the spool in a direction opposite to a direction of a force applied to the spool by fluid pressure in the pressure chamber. A supply passage fluidly communicates the cylinder and a fluid pressure supply source, and a drain passage fluidly communicates the cylinder and a sump. A through-passage formed in the spool fluidly communicates the pressure chamber and the space portion. An orifice disposed between the space portion and a sump limits a flow rate of fluid drained from the space portion to the sump. The spool is made of material having a lower thermal expansion coefficient than material of the valve body.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: February 7, 2006
    Assignee: JATCO LTD
    Inventors: Kunihiro Yamaguchi, Koichi Tamura, Akinori Araki, Yasushi Nagai
  • Patent number: 6819334
    Abstract: An information processing apparatus has a processing unit, a memory unit for storing display data processed by the processing unit, a display image rotation engine which is coupled with a buffer memory to sequentially transfer display data to the buffer memory and which responds to a command of predetermined timing for display data update to store the display data stored in the memory unit in read sequence different from write sequence, a display controller for delivering the display data, stored in the buffer memory, in the memory unit by means of the rotation engine to a display device, and a bus for mutually coupling the processing unit, the memory unit, the display controller and the rotation engine.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: November 16, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Toru Owada, Isao Takita, Yasushi Nagai, Kanetoshi Saito, Takuichiro Nakazawa
  • Publication number: 20040138025
    Abstract: A pressure regulating valve which is comprised of a valve body being comprised of a cylinder, a spool slidably disposed in the cylinder with a clearance, the spool and the cylinder defining a pressure chamber and a space portion, and an urging member which urges the spool in a direction opposite to a direction of a force applied to the spool by fluid pressure in the pressure chamber. A supply passage fluidly communicates the cylinder and a fluid pressure supply source, and a drain passage fluidly communicates the cylinder and a sump. A through-passage formed in the spool fluidly communicates the pressure chamber and the space portion. An orifice disposed between the space portion and a sump limits a flow rate of fluid drained from the space portion to the sump. The spool is made of material having a lower thermal expansion coefficient than material of the valve body.
    Type: Application
    Filed: October 29, 2003
    Publication date: July 15, 2004
    Applicant: JATCO Ltd
    Inventors: Kunihiro Yamaguchi, Koichi Tamura, Akinori Araki, Yasushi Nagai
  • Patent number: 6685588
    Abstract: In a roller chain in which a plurality of rolling bodies is disposed between a roller and a bushing, between a bushing and a pin, or between a roller and a pin, the rolling bodies include at least one carbon-impregnated ceramic rolling body, or at least one carbon-coated steel rolling body. Preferably, the carbon-impregnated or carbon-coated rolling bodies are disposed in an alternating configuration with steel rolling bodies.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: February 3, 2004
    Assignee: Tsubakimoto Chain Co.
    Inventors: Katsuo Doi, Yasushi Nagai, Seiji Kitagawa
  • Patent number: 6675224
    Abstract: A system which serves both as a host and a device cannot be realized with a single connector due to the constitution of hardware in the prior art. The prior art system only detects the existence of a device and cannot distinguish between a host and a device while a power source is turned on and switch its function. The information processing apparatus of the present invention separates the data lines of a host communication controller and the data lines of a device communication controller and activates the selected controller by means of selecting the data lines of the controllers and means of determining which is connected to a connector, a host or a device.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: January 6, 2004
    Assignees: Hitachi, Ltd., Kokusai Electric Co., Ltd.
    Inventors: Isao Takita, Naoko Iwami, Yoshiaki Eguchi, Shinichi Sawamura, Itaru Nonomura, Toru Owada, Yasushi Nagai, Shinichi Kato
  • Publication number: 20020173392
    Abstract: In a roller chain in which a plurality of rolling bodies is disposed between a roller and a bushing, between a bushing and a pin, or between a roller and a pin, the rolling bodies include at least one carbon-impregnated ceramic rolling body, or at least one carbon-coated steel rolling body. Preferably, the carbon-impregnated or carbon-coated rolling bodies are disposed in an alternating configuration with steel rolling bodies.
    Type: Application
    Filed: May 1, 2002
    Publication date: November 21, 2002
    Inventors: Katsuo Doi, Yasushi Nagai, Seiji Kitagawa
  • Patent number: 4613571
    Abstract: There are disclosed polyprenyl sulfone derivatives of the general formula: ##STR1## wherein n represents an integer of 1-4, R.sub.1 represents an aryl group d R.sub.2 represents a hydroxymethyl or carboxyl group. The polyprenyl sulfone derivatives are prepared by cultivating a microorganism of the genus Nocardia capable of oxidizing a compound of the general formula: ##STR2## wherein n and R.sub.1 have the same meanings as defined above, in a culture medium containing a compound of the above general formula (II), and then collecting the oxidation product from the culture mixture. The polyprenyl sulfone derivatives are useful as intermediates for preparing various useful polyprenyl compounds.
    Type: Grant
    Filed: February 21, 1984
    Date of Patent: September 23, 1986
    Assignees: Esai Co., Ltd., General Director of the Agency of Industrial Science and Technology
    Inventors: Akio Sato, Kenji Nakajima, Yoshimasa Takahara, Shizumasa Kijima, Hideaki Watanabe, Tamio Kawamura, Yasushi Nagai
  • Patent number: 4449002
    Abstract: There are disclosed polyprenyl sulfone derivatives of the general formula: ##STR1## wherein n represents an integer of 1-4, R.sub.1 represents an aryl group d R.sub.2 represents a hydroxymethyl or carboxyl group. The polyprenyl sulfone derivatives are prepared by cultivating a microorganism of the genus Nocardia capable of oxidizing a compound of the general formula: ##STR2## wherein n and R.sub.1 have the same meanings as defined above, in a culture medium containing a compound of the above general formula (II), and then collecting the oxidation product from the culture mixture. The polyprenyl sulfone derivatives are useful as intermediates for preparing various useful polyprenyl compounds.
    Type: Grant
    Filed: April 14, 1982
    Date of Patent: May 15, 1984
    Assignees: Eisai Co., Ltd., General Director of the Agency of Industrial Science and Technology
    Inventors: Akio Sato, Kenji Nakajima, Yoshimasa Takahara, Shizumasa Kijima, Hideaki Watanabe, Tamio Kawamura, Yasushi Nagai