Patents by Inventor Yasutaka Yamashita

Yasutaka Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240082956
    Abstract: A substrate processing method includes (A) to (C) to be described below. (A) A substrate having a first main surface and a second main surface opposite to the first main surface, and having unevenness on each of the first main surface and the second main surface is prepared. (B) Based on a measurement result of the unevenness of a first surface between the first main surface and the second main surface of the substrate, the first surface is planarized by radiating a laser beam to the first surface. (C) After planarizing the first surface of the substrate, a second surface of the substrate opposite to the first surface is planarized by grinding the second surface.
    Type: Application
    Filed: January 11, 2022
    Publication date: March 14, 2024
    Inventors: Susumu HAYAKAWA, Yohei YAMASHITA, Yasutaka MIZOMOTO
  • Patent number: 11894822
    Abstract: A filter device includes: delay units serially connected to delay an input signal and output a delayed signal; multiplication units multiplying the delayed signal by a filter coefficient based on a predetermined value and a multiplying factor adjustment value; a coefficient adjustment unit that, when a multiplication result obtained by multiplying the predetermined value by the multiplying factor adjustment value exceeds a maximum value of a filter-coefficient representation range, divides the multiplication result exceeding the maximum value by the maximum value, and outputs a quotient of division as a coefficient adjustment value; a signal conversion unit outputting a signal obtained by adding after-filter-coefficient-multiplication signals outputted by the multiplication units and an adjusted signal obtained by adjusting a corresponding delayed signal using the coefficient adjustment value; and a division unit generating an output signal by dividing the signal outputted by the signal conversion unit by the
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: February 6, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasutaka Yamashita, Shigenori Tani, Kazuma Kaneko, Shigeru Uchida
  • Publication number: 20230367552
    Abstract: A calculation circuit includes: processing circuitry that divides a quantized signal into a first bit string and a second bit string, and converts the first bit string into a sequence including two or more bits and representing a numerical value by a ratio of 1 present therein; calculates the sequence converted by the conversion unit by stochastic signal processing using a combinational circuit; and adds a ratio of 1 present in a sequence after calculation and a value obtained by multiplying the second bit string by a number represented by the first bit string, and performs reconversion into a quantized signal.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shigenori TANI, Yasutaka YAMASHITA
  • Patent number: 11765007
    Abstract: A signal specification identification apparatus includes processing circuitry that estimates the transmission rate of a received signal, performs sampling frequency conversion on the received signal, calculates a probability corresponding to each of a plurality of candidates for a specification of the received signal, selects a candidate using the respective probabilities, and calculates reliability corresponding to a selected candidate, determines whether to output the selected candidate as an identification result or perform the sampling frequency conversion again, based on the reliability, and changes a parameter indicating the ratio of the sampling frequency conversion when it is determined that the sampling frequency conversion is to be performed again. Processing is repeated until the processing circuitry determines that the selected candidate as the identification result is to be output.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: September 19, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasutaka Yamashita, Shigeru Uchida
  • Publication number: 20230246889
    Abstract: A modulation scheme identification apparatus includes: a modulation scheme specification circuitry that outputs a first probability distribution for a plurality of modulation schemes for a signal waveform input; a matching rate calculator that calculates a matching rate between the first probability distribution and a second probability distribution defined for a first modulation scheme that is a modulation scheme having a highest probability in the first probability distribution; and a determination circuitry that determines whether the modulation scheme of the signal waveform is the first modulation scheme or an unknown modulation scheme, based on the matching rate.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yasutaka YAMASHITA
  • Publication number: 20230155868
    Abstract: A signal specification identification apparatus includes processing circuitry that estimates the transmission rate of a received signal, performs sampling frequency conversion on the received signal, calculates a probability corresponding to each of a plurality of candidates for a specification of the received signal, selects a candidate using the respective probabilities, and calculates reliability corresponding to a selected candidate, determines whether to output the selected candidate as an identification result or perform the sampling frequency conversion again, based on the reliability, and changes a parameter indicating the ratio of the sampling frequency conversion when it is determined that the sampling frequency conversion is to be performed again. Processing is repeated until the processing circuitry determines that the selected candidate as the identification result is to be output.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 18, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasutaka Yamashita, Shigeru Uchida
  • Patent number: 11621736
    Abstract: A data processing device includes a restoration unit that performs a conversion operation on an input signal to convert the input signal into a signal having no distortion caused by an external factor, and a selection unit that selects and outputs either an unrestored signal, which is the input signal, or a restored signal, which is a signal obtained by the restoration unit by performing the conversion operation, based on a feature quantity of the unrestored signal and on a feature quantity of the restored signal.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: April 4, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shigenori Tani, Yasutaka Yamashita
  • Publication number: 20220239283
    Abstract: A filter device includes: delay units serially connected to delay an input signal and output a delayed signal; multiplication units multiplying the delayed signal by a filter coefficient based on a predetermined value and a multiplying factor adjustment value; a coefficient adjustment unit that, when a multiplication result obtained by multiplying the predetermined value by the multiplying factor adjustment value exceeds a maximum value of a filter-coefficient representation range, divides the multiplication result exceeding the maximum value by the maximum value, and outputs a quotient of division as a coefficient adjustment value; a signal conversion unit outputting a signal obtained by adding after-filter-coefficient-multiplication signals outputted by the multiplication units and an adjusted signal obtained by adjusting a corresponding delayed signal using the coefficient adjustment value; and a division unit generating an output signal by dividing the signal outputted by the signal conversion unit by the
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasutaka YAMASHITA, Shigenori TANI, Kazuma KANEKO, Shigeru UCHIDA
  • Patent number: 11381458
    Abstract: A network management device according to the present invention includes a metric calculation unit that calculates, using location information of multiple nodes constituting a network, metrics for respective combinations of the nodes, a false detection determination unit that determines, using the metrics and using link estimation information, which is information indicating a combination of nodes presumed that has a link therebetween, a falsely detected link corresponding to a combination of nodes indicated as having a link therebetween in the link estimation information, but presumed that has no link therebetween in reality, and a non-detection determination unit that determines, using the metrics and the link estimation information, an undetected link corresponding to a combination of nodes indicated as having no link therebetween in the link estimation information, but presumed that has a link therebetween in reality.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: July 5, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasutaka Yamashita, Shigenori Tani, Katsuyuki Motoyoshi
  • Publication number: 20220173757
    Abstract: A data processing device includes a restoration unit that performs a conversion operation on an input signal to convert the input signal into a signal having no distortion caused by an external factor, and a selection unit that selects and outputs either an unrestored signal, which is the input signal, or a restored signal, which is a signal obtained by the restoration unit by performing the conversion operation, based on a feature quantity of the unrestored signal and on a feature quantity of the restored signal.
    Type: Application
    Filed: February 15, 2022
    Publication date: June 2, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shigenori TANI, Yasutaka YAMASHITA
  • Publication number: 20200244540
    Abstract: A network management device according to the present invention includes a metric calculation unit that calculates, using location information of multiple nodes constituting a network, metrics for respective combinations of the nodes, a false detection determination unit that determines, using the metrics and using link estimation information, which is information indicating a combination of nodes presumed that has a link therebetween, a falsely detected link corresponding to a combination of nodes indicated as having a link therebetween in the link estimation information, but presumed that has no link therebetween in reality, and a non-detection determination unit that determines, using the metrics and the link estimation information, an undetected link corresponding to a combination of nodes indicated as having no link therebetween in the link estimation information, but presumed that has a link therebetween in reality.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasutaka YAMASHITA, Shigenori TANI, Katsuyuki MOTOYOSHI
  • Patent number: 7394810
    Abstract: A layer 2 switch enables communication between different layer 2 networks by rewriting an expansion VLAN tag according to a network of a frame transfer destination, as well as producing the same effect, by rewriting an expansion VLAN tag, as that obtained by applying expansion VLAN tags to the third and the following stages.
    Type: Grant
    Filed: November 5, 2003
    Date of Patent: July 1, 2008
    Assignee: NEC Corporation
    Inventors: Hidefumi Natsume, Yasutaka Yamashita
  • Publication number: 20040095941
    Abstract: A layer 2 switch enables communication between different layer 2 networks by rewriting an expansion VLAN tag according to a network of a frame transfer destination, as well as producing the same effect, by rewriting an expansion VLAN tag, as that obtained by applying expansion VLAN tags to the third and the following stages.
    Type: Application
    Filed: November 5, 2003
    Publication date: May 20, 2004
    Applicant: NEC CORPORATION
    Inventors: Hidefumi Natsume, Yasutaka Yamashita