Patents by Inventor Yasuyuki Shimada
Yasuyuki Shimada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967461Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately laminated therein, and two end surfaces opposing each other in a length direction, and two side surfaces opposing each other in a width direction, and two external electrodes respectively on the two end surfaces of the multilayer body. At least one of two opposed main surfaces of the multilayer ceramic capacitor includes raised portions provided respectively on one side and another side with a middle portion of the main surface interposed therebetween. The raised portions are each raised to become thicker in the lamination direction from the middle portion toward an outer periphery of the main surface.Type: GrantFiled: September 20, 2021Date of Patent: April 23, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yasuyuki Shimada, Akira Tanaka, Shinichi Kokawa
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Patent number: 11948746Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes respectively on two end surfaces of the multilayer body. Each of the dielectric layers includes, at a location coincident with an end portion of a respective one of the internal electrodes, a thick-walled portion thicker in a stacking direction than a portion corresponding in position to a middle portion of a main surface of the multilayer body. When viewed in the stacking direction, positions of some of the thick-walled portions of the dielectric layers are out of alignment with positions of a remainder of the thick-walled portions of the dielectric layers.Type: GrantFiled: June 7, 2022Date of Patent: April 2, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Yasuyuki Shimada
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Publication number: 20240092084Abstract: A technique capable of certainly suppressing adhesion of waste ink to hands, clothes, and the like during replacement of a waste ink tank is provided. There are included a container portion provided with an insertion port which a discharge member discharging waste ink can be inserted into and pulled out from and a shielding portion movable between a shielding position where the insertion port is shielded and an open position where the insertion port is opened.Type: ApplicationFiled: September 11, 2023Publication date: March 21, 2024Inventors: KOKI SHIMADA, TOSHIAKI SOMANO, YUTA ARAKI, KAORI KATAYAMA, YUSUKE TANAKA, TETSU HAMANO, ERIKA IYAMA, FUMIE KAMEYAMA, NOBUHIRO TOKI, YASUYUKI TAKANAKA, DAIJU TAKEDA
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Publication number: 20230020333Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes on two end surfaces of the multilayer body. The internal electrodes include first internal electrodes and second internal electrodes arranged alternately. A distance between the first internal electrodes adjacent to each other includes a distance T11 and a distance T12. The distance T11 is greater than the distance T12. A distance between the second internal electrodes adjacent to each other includes a distance T21 and a distance T22. The distance T21 is greater than the distance T22.Type: ApplicationFiled: June 7, 2022Publication date: January 19, 2023Inventor: Yasuyuki SHIMADA
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Publication number: 20230016359Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes respectively on two end surfaces of the multilayer body. Each of the dielectric layers includes, at a location coincident with an end portion of a respective one of the internal electrodes, a thick-walled portion thicker in a stacking direction than a portion corresponding in position to a middle portion of a main surface of the multilayer body. When viewed in the stacking direction, positions of some of the thick-walled portions of the dielectric layers are out of alignment with positions of a remainder of the thick-walled portions of the dielectric layers.Type: ApplicationFiled: June 7, 2022Publication date: January 19, 2023Inventor: Yasuyuki SHIMADA
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Patent number: 11404213Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and layered internal electrodes, first and second main surfaces, first and second side surfaces, first and second end surfaces, and an external electrode connected to the internal electrodes and provided on each of the first and second end surfaces. A region where the internal electrodes are superimposed is defined as an effective region, regions respectively located on sides of the first and second end surfaces relative to the effective region are defined as first and second regions, and a bent portion where the dielectric layers and the internal electrodes are bent is located in the first region. In the bent portion, all vertices in the stacking direction are located within a range that extends by about 25 ?m to about 35 ?m in a length direction from the effective region of the multilayer body.Type: GrantFiled: August 24, 2020Date of Patent: August 2, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Shinichi Kokawa, Yasuyuki Shimada, Naoto Muranishi, Takehisa Sasabayashi
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Patent number: 11398349Abstract: An end surface outer layer Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in a dielectric ceramic layer in an end surface outer layer portion, is higher than a central portion Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in the dielectric ceramic layer in a central portion in a width direction, a length direction, and a layering direction in an effective portion, and a peak intensity of Ni found by TEM-EDX is in a portion of the dielectric ceramic layers in the end surface outer layer portion.Type: GrantFiled: March 1, 2021Date of Patent: July 26, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
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Patent number: 11380483Abstract: In a multilayer ceramic capacitor, when a ratio of an ICP peak intensity of Mn to an ICP peak intensity of Ti is an Mn/Ti peak intensity ratio, a value of the Mn/Ti peak intensity ratio in a dielectric ceramic layer in at least one of a main surface outer layer portion, a side surface outer layer portion, and an end surface outer layer portion is in a range of two times to fifteen times a value of the Mn/Ti peak intensity ratio in a dielectric ceramic layer in a central portion of an effective portion in a width direction, a length direction, and a stacking direction.Type: GrantFiled: December 23, 2020Date of Patent: July 5, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
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Patent number: 11373805Abstract: An Mn/Ti peak intensity ratio in a dielectric ceramic layer in an end surface outer layer portion is within two times to fifteen times of the Mn/Ti peak intensity ratio in a central portion, a rare earth element/Ti peak intensity ratio in the dielectric ceramic layer in the end surface outer layer portion is within two times to seven times the rare earth element/Ti peak intensity ratio in the central portion, an Si/Ti peak intensity ratio in the dielectric ceramic layer in a side surface outer layer portion is within two times to five times the Si/Ti peak intensity ratio in the central portion, and the rare earth element/Ti peak intensity ratio in the dielectric ceramic layer in the side surface outer layer portion is within two times to seven times the rare earth element/Ti peak intensity ratio.Type: GrantFiled: March 1, 2021Date of Patent: June 28, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
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Publication number: 20220148807Abstract: A multilayer ceramic capacitor includes end-surface external electrodes and side-surface external electrodes. The end-surface external electrodes are respectively provided at end surfaces of a multilayer body and are respectively connected to end-surface connecting internal electrodes. The side-surface external electrodes are respectively provided at the side surfaces of the multilayer body and respectively connected to side-surface connecting internal electrodes. The end-surface connecting internal electrodes each include end surface opposing portion opposing the side-surface connecting internal electrode 15B adjacent in a lamination direction, and an end surface lead-out portion extending from the end surface opposing portion to one of the end-surface external electrodes.Type: ApplicationFiled: October 21, 2021Publication date: May 12, 2022Inventors: Akira ISHIZUKA, Shinichi KOKAWA, Yasuyuki SHIMADA
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Publication number: 20220093331Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately laminated therein, and two end surfaces opposing each other in a length direction, and two side surfaces opposing each other in a width direction, and two external electrodes respectively on the two end surfaces of the multilayer body. At least one of two opposed main surfaces of the multilayer ceramic capacitor includes raised portions provided respectively on one side and another side with a middle portion of the main surface interposed therebetween. The raised portions are each raised to become thicker in the lamination direction from the middle portion toward an outer periphery of the main surface.Type: ApplicationFiled: September 20, 2021Publication date: March 24, 2022Inventors: Yasuyuki SHIMADA, Akira TANAKA, Shinichi KOKAWA
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Publication number: 20210287854Abstract: An end surface outer layer Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in a dielectric ceramic layer in an end surface outer layer portion, is higher than a central portion Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in the dielectric ceramic layer in a central portion in a width direction, a length direction, and a layering direction in an effective portion, and a peak intensity of Ni found by TEM-EDX is in a portion of the dielectric ceramic layers in the end surface outer layer portion.Type: ApplicationFiled: March 1, 2021Publication date: September 16, 2021Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
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Publication number: 20210287853Abstract: An Mn/Ti peak intensity ratio in a dielectric ceramic layer in an end surface outer layer portion is within two times to fifteen times of the Mn/Ti peak intensity ratio in a central portion, a rare earth element/Ti peak intensity ratio in the dielectric ceramic layer in the end surface outer layer portion is within two times to seven times the rare earth element/Ti peak intensity ratio in the central portion, an Si/Ti peak intensity ratio in the dielectric ceramic layer in a side surface outer layer portion is within two times to five times the Si/Ti peak intensity ratio in the central portion, and the rare earth element/Ti peak intensity ratio in the dielectric ceramic layer in the side surface outer layer portion is within two times to seven times the rare earth element/Ti peak intensity ratio.Type: ApplicationFiled: March 1, 2021Publication date: September 16, 2021Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
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Publication number: 20210210285Abstract: In a multilayer ceramic capacitor, when a ratio of an ICP peak intensity of Mn to an ICP peak intensity of Ti is an Mn/Ti peak intensity ratio, a value of the Mn/Ti peak intensity ratio in a dielectric ceramic layer in at least one of a main surface outer layer portion, a side surface outer layer portion, and an end surface outer layer portion is in a range of two times to fifteen times a value of the Mn/Ti peak intensity ratio in a dielectric ceramic layer in a central portion of an effective portion in a width direction, a length direction, and a stacking direction.Type: ApplicationFiled: December 23, 2020Publication date: July 8, 2021Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
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Publication number: 20210074482Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and layered internal electrodes, first and second main surfaces, first and second side surfaces, first and second end surfaces, and an external electrode connected to the internal electrodes and provided on each of the first and second end surfaces. A region where the internal electrodes are superimposed is defined as an effective region, regions respectively located on sides of the first and second end surfaces relative to the effective region are defined as first and second regions, and a bent portion where the dielectric layers and the internal electrodes are bent is located in the first region. In the bent portion, all vertices in the stacking direction are located within a range that extends by about 25 ?m to about 35 ?m in a length direction from the effective region of the multilayer body.Type: ApplicationFiled: August 24, 2020Publication date: March 11, 2021Inventors: Shinichi KOKAWA, Yasuyuki SHIMADA, Naoto MURANISHI, Takehisa SASABAYASHI
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Patent number: 10395833Abstract: In a laminated ceramic electronic component, a side-surface outer electrode includes a first electrode portion including side-surface electrode portions located on first and second side surfaces and wrap-around electrode portions arranged to extend around from the side-surface electrode portions of the first electrode portion to portions of third and fourth side surfaces; and a second electrode portion including side-surface electrode portions located on the third and fourth side surfaces and wrap-around electrode portions arranged to extend around from the side-surface electrode portions of the second electrode portion to portions of the first and second side surfaces. The wrap-around electrode portions of the second electrode portion reach regions covering portions of outermost inner electrodes located at an outermost side portion among inner electrodes, which portions are exposed in the first and second side surfaces.Type: GrantFiled: August 22, 2016Date of Patent: August 27, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yasuyuki Shimada, Takashi Sawada
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Patent number: 10361032Abstract: A ceramic capacitor that has low ESL and is suitable to be built into a substrate includes a first external electrode including a first portion extending from a portion located on a first principal surface to a portion of a first end surface, a second portion extending from a portion located on a second principal surface to a portion of the first end surface, a third portion extending from a portion located on a first side surface to a portion of the first end surface, and a fourth portion extending from a portion located on a second side surface to a portion of the first end surface. The first external electrode includes an outermost layer that is a Cu plated layer.Type: GrantFiled: May 30, 2017Date of Patent: July 23, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Yasuyuki Shimada
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Patent number: 10079104Abstract: A capacitor includes an outer electrode extends over first and second main surfaces from exposed portions of inner electrodes on a first side surface and exposed portions of the inner electrodes on a second side surface. An outermost layer of the outer electrode includes a Cu-plated layer.Type: GrantFiled: December 14, 2016Date of Patent: September 18, 2018Assignee: Murata Manufacturing Co., Ltd.Inventor: Yasuyuki Shimada
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Publication number: 20170345562Abstract: A ceramic capacitor that has low ESL and is suitable to be built into a substrate includes a first external electrode including a first portion extending from a portion located on a first principal surface to a portion of a first end surface, a second portion extending from a portion located on a second principal surface to a portion of the first end surface, a third portion extending from a portion located on a first side surface to a portion of the first end surface, and a fourth portion extending from a portion located on a second side surface to a portion of the first end surface. The first external electrode includes an outermost layer that is a Cu plated layer.Type: ApplicationFiled: May 30, 2017Publication date: November 30, 2017Inventor: Yasuyuki SHIMADA
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Publication number: 20170169951Abstract: A capacitor includes an outer electrode extends over first and second main surfaces from exposed portions of inner electrodes on a first side surface and exposed portions of the inner electrodes on a second side surface. An outermost layer of the outer electrode includes a Cu-plated layer.Type: ApplicationFiled: December 14, 2016Publication date: June 15, 2017Inventor: Yasuyuki SHIMADA