Patents by Inventor Yasuyuki Shimada

Yasuyuki Shimada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240352161
    Abstract: A a crosslinkable polymer composition which provides a crosslinked product capable of both heat resistance and re-formability, a crosslinked polymer material capable of both heat resistance and re-formability, and an insulated wire and a wiring harness including the crosslinked polymer material. The crosslinkable polymer composition includes: ingredient A from which metal ion is released by heat; and ingredient B including an organic polymer having a side chain, including an electron-withdrawing substituent group capable of forming an ionic bond with the metal ion, and when B is crosslinked via the metal ion to form a crosslinked product, the product has a flow starting temperature of 190° C. or higher and 300° C. or lower. The crosslinked polymer material includes the crosslinked product of the crosslinkable polymer composition. The insulated wire includes a wire conductor, and an insulation coating including the crosslinked polymer material, and the wiring harness including the insulated wire.
    Type: Application
    Filed: August 29, 2022
    Publication date: October 24, 2024
    Applicants: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD., KYUSHU UNIVERSITY, NATIONAL UNIVERSITY CORPORATION
    Inventors: Masashi SATO, Takehiro HOSOKAWA, Yasuyuki OTSUKA, Tatsuya SHIMADA, Tatsuya HASE, Makoto MIZOGUCHI
  • Publication number: 20240321519
    Abstract: A multilayer ceramic capacitor includes end-surface external electrodes and side-surface external electrodes. The end-surface external electrodes are respectively provided at end surfaces of a multilayer body and are respectively connected to end-surface connecting internal electrodes. The side-surface external electrodes are respectively provided at the side surfaces of the multilayer body and respectively connected to side-surface connecting internal electrodes. The end-surface connecting internal electrodes each include end surface opposing portion opposing the side-surface connecting internal electrode 15B adjacent in a lamination direction, and an end surface lead-out portion extending from the end surface opposing portion to one of the end-surface external electrodes.
    Type: Application
    Filed: June 6, 2024
    Publication date: September 26, 2024
    Inventors: Akira ISHIZUKA, Shinichi KOKAWA, Yasuyuki SHIMADA
  • Publication number: 20240319907
    Abstract: A memory system includes a nonvolatile memory including a plurality of memory cells, and a controller. The controller is configured to perform a read operation to determine a value of multi-bit data stored in each of the memory cells by using a first plurality of read voltages, and perform an estimation of optimum values of the read voltages. The estimation is performed by applying a second plurality of read voltages to the memory cells and obtaining a first string of bit counts. The estimation is performed further by obtaining a second string of differential bit counts, each of which indicates a difference between adjacent bit counts in the first string of bit counts, extracting a part of the differential bit counts from the second string, and estimating the optimum values of the read voltages using the extracted differential bit counts.
    Type: Application
    Filed: February 28, 2024
    Publication date: September 26, 2024
    Inventors: Katsuyuki SHIMADA, Yuki KOMATSU, Yasuyuki USHIJIMA
  • Patent number: 12080485
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes on two end surfaces of the multilayer body. The internal electrodes include first internal electrodes and second internal electrodes arranged alternately. A distance between the first internal electrodes adjacent to each other includes a distance T11 and a distance T12. The distance T11 is greater than the distance T12. A distance between the second internal electrodes adjacent to each other includes a distance T21 and a distance T22. The distance T21 is greater than the distance T22.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: September 3, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yasuyuki Shimada
  • Publication number: 20240282522
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers that are laminated, first and second main surfaces opposed to each other in a lamination direction, first and second lateral surfaces opposed to each other in a width direction orthogonal or substantially orthogonal to the lamination direction, and first and second end surfaces opposed to each other in a length direction orthogonal or substantially orthogonal to the lamination direction and the width direction. The multilayer body further includes external electrodes that are respectively provided on the first end surface and the second end surface and connected to the internal electrode layers. The internal electrode layers each include first and second regions respectively including different coverages. The first region includes a larger coverage than the second region. The first region is connected to a corresponding one of the external electrodes.
    Type: Application
    Filed: April 30, 2024
    Publication date: August 22, 2024
    Inventor: Yasuyuki SHIMADA
  • Patent number: 12062400
    Abstract: A memory system includes a memory including nonvolatile memory cells, and a controller configured to set read voltages for reading data stored in the nonvolatile memory cells. The controller stores first shift patterns relating to a plurality of read voltages, first index information associating to a first shift pattern with each of a plurality of memory cell groups, second shift patterns relating to differences between read voltages and read voltages set according to a first shift pattern, and second index information associating a second shift pattern with each memory cell group. The controller generates read voltages of a target memory cell group based on the first shift pattern voltages and the second shift pattern voltages.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: August 13, 2024
    Assignee: Kioxia Corporation
    Inventors: Katsuyuki Shimada, Yuki Komatsu, Shingo Yanagawa, Yasuyuki Ushijima
  • Publication number: 20240266111
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately laminated therein, and two end surfaces opposing each other in a length direction, and two side surfaces opposing each other in a width direction, and two external electrodes respectively on the two end surfaces of the multilayer body. At least one of two opposed main surfaces of the multilayer ceramic capacitor includes raised portions provided respectively on one side and another side with a middle portion of the main surface interposed therebetween. The raised portions are each raised to become thicker in the lamination direction from the middle portion toward an outer periphery of the main surface.
    Type: Application
    Filed: April 3, 2024
    Publication date: August 8, 2024
    Inventors: Yasuyuki SHIMADA, Akira TANAKA, Shinichi KOKAWA
  • Patent number: 12040136
    Abstract: A multilayer ceramic capacitor includes end-surface external electrodes and side-surface external electrodes. The end-surface external electrodes are respectively provided at end surfaces of a multilayer body and are respectively connected to end-surface connecting internal electrodes. The side-surface external electrodes are respectively provided at the side surfaces of the multilayer body and respectively connected to side-surface connecting internal electrodes. The end-surface connecting internal electrodes each include end surface opposing portion opposing the side-surface connecting internal electrode 15B adjacent in a lamination direction, and an end surface lead-out portion extending from the end surface opposing portion to one of the end-surface external electrodes.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: July 16, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akira Ishizuka, Shinichi Kokawa, Yasuyuki Shimada
  • Publication number: 20240203647
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes respectively on two end surfaces of the multilayer body. Each of the dielectric layers includes, at a location coincident with an end portion of a respective one of the internal electrodes, a thick-walled portion thicker in a stacking direction than a portion corresponding in position to a middle portion of a main surface of the multilayer body. When viewed in the stacking direction, positions of some of the thick-walled portions of the dielectric layers are out of alignment with positions of a remainder of the thick-walled portions of the dielectric layers.
    Type: Application
    Filed: February 29, 2024
    Publication date: June 20, 2024
    Inventor: Yasuyuki SHIMADA
  • Patent number: 11967461
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately laminated therein, and two end surfaces opposing each other in a length direction, and two side surfaces opposing each other in a width direction, and two external electrodes respectively on the two end surfaces of the multilayer body. At least one of two opposed main surfaces of the multilayer ceramic capacitor includes raised portions provided respectively on one side and another side with a middle portion of the main surface interposed therebetween. The raised portions are each raised to become thicker in the lamination direction from the middle portion toward an outer periphery of the main surface.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: April 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yasuyuki Shimada, Akira Tanaka, Shinichi Kokawa
  • Patent number: 11948746
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes respectively on two end surfaces of the multilayer body. Each of the dielectric layers includes, at a location coincident with an end portion of a respective one of the internal electrodes, a thick-walled portion thicker in a stacking direction than a portion corresponding in position to a middle portion of a main surface of the multilayer body. When viewed in the stacking direction, positions of some of the thick-walled portions of the dielectric layers are out of alignment with positions of a remainder of the thick-walled portions of the dielectric layers.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: April 2, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yasuyuki Shimada
  • Publication number: 20230016359
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes respectively on two end surfaces of the multilayer body. Each of the dielectric layers includes, at a location coincident with an end portion of a respective one of the internal electrodes, a thick-walled portion thicker in a stacking direction than a portion corresponding in position to a middle portion of a main surface of the multilayer body. When viewed in the stacking direction, positions of some of the thick-walled portions of the dielectric layers are out of alignment with positions of a remainder of the thick-walled portions of the dielectric layers.
    Type: Application
    Filed: June 7, 2022
    Publication date: January 19, 2023
    Inventor: Yasuyuki SHIMADA
  • Publication number: 20230020333
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately stacked on one another, and two external electrodes on two end surfaces of the multilayer body. The internal electrodes include first internal electrodes and second internal electrodes arranged alternately. A distance between the first internal electrodes adjacent to each other includes a distance T11 and a distance T12. The distance T11 is greater than the distance T12. A distance between the second internal electrodes adjacent to each other includes a distance T21 and a distance T22. The distance T21 is greater than the distance T22.
    Type: Application
    Filed: June 7, 2022
    Publication date: January 19, 2023
    Inventor: Yasuyuki SHIMADA
  • Patent number: 11404213
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and layered internal electrodes, first and second main surfaces, first and second side surfaces, first and second end surfaces, and an external electrode connected to the internal electrodes and provided on each of the first and second end surfaces. A region where the internal electrodes are superimposed is defined as an effective region, regions respectively located on sides of the first and second end surfaces relative to the effective region are defined as first and second regions, and a bent portion where the dielectric layers and the internal electrodes are bent is located in the first region. In the bent portion, all vertices in the stacking direction are located within a range that extends by about 25 ?m to about 35 ?m in a length direction from the effective region of the multilayer body.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: August 2, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinichi Kokawa, Yasuyuki Shimada, Naoto Muranishi, Takehisa Sasabayashi
  • Patent number: 11398349
    Abstract: An end surface outer layer Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in a dielectric ceramic layer in an end surface outer layer portion, is higher than a central portion Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in the dielectric ceramic layer in a central portion in a width direction, a length direction, and a layering direction in an effective portion, and a peak intensity of Ni found by TEM-EDX is in a portion of the dielectric ceramic layers in the end surface outer layer portion.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: July 26, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
  • Patent number: 11380483
    Abstract: In a multilayer ceramic capacitor, when a ratio of an ICP peak intensity of Mn to an ICP peak intensity of Ti is an Mn/Ti peak intensity ratio, a value of the Mn/Ti peak intensity ratio in a dielectric ceramic layer in at least one of a main surface outer layer portion, a side surface outer layer portion, and an end surface outer layer portion is in a range of two times to fifteen times a value of the Mn/Ti peak intensity ratio in a dielectric ceramic layer in a central portion of an effective portion in a width direction, a length direction, and a stacking direction.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: July 5, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
  • Patent number: 11373805
    Abstract: An Mn/Ti peak intensity ratio in a dielectric ceramic layer in an end surface outer layer portion is within two times to fifteen times of the Mn/Ti peak intensity ratio in a central portion, a rare earth element/Ti peak intensity ratio in the dielectric ceramic layer in the end surface outer layer portion is within two times to seven times the rare earth element/Ti peak intensity ratio in the central portion, an Si/Ti peak intensity ratio in the dielectric ceramic layer in a side surface outer layer portion is within two times to five times the Si/Ti peak intensity ratio in the central portion, and the rare earth element/Ti peak intensity ratio in the dielectric ceramic layer in the side surface outer layer portion is within two times to seven times the rare earth element/Ti peak intensity ratio.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: June 28, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa
  • Publication number: 20220148807
    Abstract: A multilayer ceramic capacitor includes end-surface external electrodes and side-surface external electrodes. The end-surface external electrodes are respectively provided at end surfaces of a multilayer body and are respectively connected to end-surface connecting internal electrodes. The side-surface external electrodes are respectively provided at the side surfaces of the multilayer body and respectively connected to side-surface connecting internal electrodes. The end-surface connecting internal electrodes each include end surface opposing portion opposing the side-surface connecting internal electrode 15B adjacent in a lamination direction, and an end surface lead-out portion extending from the end surface opposing portion to one of the end-surface external electrodes.
    Type: Application
    Filed: October 21, 2021
    Publication date: May 12, 2022
    Inventors: Akira ISHIZUKA, Shinichi KOKAWA, Yasuyuki SHIMADA
  • Publication number: 20220093331
    Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrodes alternately laminated therein, and two end surfaces opposing each other in a length direction, and two side surfaces opposing each other in a width direction, and two external electrodes respectively on the two end surfaces of the multilayer body. At least one of two opposed main surfaces of the multilayer ceramic capacitor includes raised portions provided respectively on one side and another side with a middle portion of the main surface interposed therebetween. The raised portions are each raised to become thicker in the lamination direction from the middle portion toward an outer periphery of the main surface.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 24, 2022
    Inventors: Yasuyuki SHIMADA, Akira TANAKA, Shinichi KOKAWA
  • Publication number: 20210287854
    Abstract: An end surface outer layer Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in a dielectric ceramic layer in an end surface outer layer portion, is higher than a central portion Mn/Ti peak intensity ratio, which is a ratio of a peak intensity of Mn found by laser ICP to a peak intensity of Ti found by laser ICP in the dielectric ceramic layer in a central portion in a width direction, a length direction, and a layering direction in an effective portion, and a peak intensity of Ni found by TEM-EDX is in a portion of the dielectric ceramic layers in the end surface outer layer portion.
    Type: Application
    Filed: March 1, 2021
    Publication date: September 16, 2021
    Inventors: Takehisa Sasabayashi, Yasuyuki Shimada, Naoto Muranishi, Shinichi Kokawa