Patents by Inventor Yen-Cheng Lu

Yen-Cheng Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170052441
    Abstract: An extreme ultraviolet (EUV) mask comprises a substrate, a first reflective layer above a surface of the substrate, and a second reflective layer over the first reflective layer. The second reflective layer has various openings that define a first state and a second state. The first state includes the first reflective layer and is free of the second reflective layer. The second state includes both the first and second reflective layers. The first state has a first reflection coefficient and a first reflectivity. The second state has a second reflection coefficient and a second reflectivity. A phase difference between the first and second reflection coefficients is about 180 degrees.
    Type: Application
    Filed: November 7, 2016
    Publication date: February 23, 2017
    Inventors: YEN-CHENG LU, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN
  • Patent number: 9575412
    Abstract: A method and system for adjusting exposure intensity to reduce unwanted lithographic effects is disclosed. In some exemplary embodiments, the method of photolithography includes receiving a mask and a workpiece. An orientation of an illumination pattern relative to the mask is determined, and an intensity profile of the illumination pattern is adjusted according to the orientation. The mask is exposed to radiation according to the illumination pattern and the intensity profile. Radiation resulting from the exposing of the mask is utilized to expose the workpiece. In some such embodiments, the intensity profile includes an intensity that varies across an illuminated region of the illumination pattern.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: February 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20170045827
    Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer.
    Type: Application
    Filed: July 25, 2016
    Publication date: February 16, 2017
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen
  • Patent number: 9557636
    Abstract: A mask, method of fabricating same, and method of using same are disclosed. In an example, a mask includes a substrate and a reflective multilayer coating deposited over the substrate. The reflective multilayer coating is formed by positioning the substrate such that an angle ? is formed between a normal line of the substrate and particles landing on the substrate and rotating the substrate about an axis that is parallel with a landing direction of the particles. In an example, reflective multilayer coating includes a first layer and a second layer deposited over the first layer. A phase defect region of the reflective multilayer coating includes a first deformation in the first layer at a first location, and a second deformation in the second layer at a second location, the second location laterally displaced from the first location.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: January 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Anthony Yen
  • Patent number: 9535334
    Abstract: The present disclosure provides a method for extreme ultraviolet lithography (EUVL) process. The method includes loading a binary phase mask (BPM) to a lithography system, wherein the BPM includes two phase states and defines an integrated circuit (IC) pattern thereon; setting an illuminator of the lithography system in an illumination mode according to the IC pattern; configuring a pupil filter in the lithography system according to the illumination mode; and performing a lithography exposure process to a target with the BPM and the pupil filter by the lithography system in the illumination mode.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9535316
    Abstract: The present disclosure provides one embodiment of a mask for a lithography exposure process. The mask includes a mask substrate; a first mask material layer patterned to have a first plurality of openings that define a first layer pattern; and a second mask material layer patterned to have a second plurality of openings that define a second layer pattern.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160377983
    Abstract: A process of an extreme ultraviolet lithography is disclosed. The process includes receiving an extreme ultraviolet (EUV) mask, an EUV radiation source and an illuminator. The process also includes exposing the EUV mask by a radiation, originating from the EUV radiation source and directed by the illuminator, with a less-than-three-degree chief ray angle of incidence at the object side (CRAO). The process further includes removing most of the non-diffracted light and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.
    Type: Application
    Filed: September 9, 2016
    Publication date: December 29, 2016
    Inventors: Shinn-Sheng YU, Anthony YEN, Yen-Cheng LU
  • Patent number: 9529272
    Abstract: A process of an extreme ultraviolet lithography (EUVL) is disclosed. The process includes receiving an extreme ultraviolet (EUV) mask with multiple states. These different states of the EUV mask are assigned to adjacent polygons and adjacent assist polygons. The EUV mask is exposed by a nearly on-axis illumination (ONI) with partial coherence ? less than 0.3 to produce diffracted lights and non-diffracted lights. Most of the non-diffracted lights reflected from main polygons and reflected lights from assist polygons are removed. The diffracted lights and the not removed non-diffracted lights reflected from main polygons are collected and directed to expose a target by a projection optics box.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: December 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160329240
    Abstract: A method includes defining a metal pattern layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is grown over the metal pattern layer and the first dielectric layer. A metal trench is formed with a metal width in the first dielectric layer. A via hole is formed with a via width in the second dielectric layer.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 10, 2016
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9488905
    Abstract: A method of forming a mask for semiconductor fabrication is disclosed. The method includes providing a substrate and forming a first reflective layer over the substrate, wherein the first reflective layer comprises pairs of alternating materials. The method further includes forming a buffer layer over the first reflective layer and forming a second reflective layer over the buffer layer. The second reflective layer has a total thickness less than 90 nanometer (nm). The method further includes patterning the second reflective layer to form a first state and a second state of the mask. A first reflection coefficient of the first state and a second reflection coefficient of the second state have a phase difference of about 180 degrees.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: November 8, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Publication number: 20160320708
    Abstract: An extreme ultraviolet (EUV) radiation source module includes a target droplet generator, a first laser source, and a second laser source. The target droplet generator is configured to generate a plurality of target droplets. The first laser source is configured to generate a plurality of first laser pulses that heat the target droplets at respective excitation positions thereby generating a plurality of target plumes. At least one of the target droplets is heated at an excitation position different from that of other target droplets. The second laser source is configured to generate a plurality of second laser pulses that heat the target plumes thereby generating plasma emitting EUV radiation.
    Type: Application
    Filed: July 20, 2015
    Publication date: November 3, 2016
    Inventors: YEN-CHENG LU, JENG-HORNG CHEN, SHUN-DER WU, TZU-HSIANG CHEN
  • Publication number: 20160306272
    Abstract: An extreme ultraviolet lithography (EUVL) system is disclosed. The system includes an extreme ultraviolet (EUV) mask with three states having respective reflection coefficient is r1, r2 and r3, wherein r3 is a pre-specified value that is a function of r1 and r2. The system also includes a nearly on-axis illumination (ONI) with partial coherence a less than 0.3 to expose the EUV mask to produce diffracted light and non-diffracted light. The system further includes a projection optics box (PUB) to remove a portion of the non-diffracted light and to collect and direct the diffracted light and the remaining non-diffracted light to expose a target.
    Type: Application
    Filed: June 27, 2016
    Publication date: October 20, 2016
    Inventors: Yen-Cheng Lu, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen
  • Publication number: 20160274465
    Abstract: The present disclosure provides an extreme ultraviolet (EUV) lithography process. The process includes loading a wafer to an EUV lithography system having an EUV source; determining a dose margin according to an exposure dosage and a plasma condition of the EUV source; and performing a lithography exposing process to the wafer by EUV light from the EUV source, using the exposure dosage and the dose margin.
    Type: Application
    Filed: May 20, 2015
    Publication date: September 22, 2016
    Inventors: YEN-CHENG LU, JENG-HORNG CHEN, SHUN-DER WU, ANTHONY YEN
  • Patent number: 9448491
    Abstract: A system of an extreme ultraviolet lithography (EUVL) is disclosed. an extreme ultraviolet lithography (EUVL) system includes an extreme ultraviolet (EUV) reflection-type mask having a patterned flare-suppressing-by-phase-shifting (FSbPhS) layer disposed over a patterned absorption layer. The system also includes a radiation to expose the EUV mask and a projection optics box (POB) to collect and direct the radiation that reflects from the EUV mask to expose a target.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: September 20, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9442387
    Abstract: A process of an extreme ultraviolet lithography is disclosed. The process includes receiving an extreme ultraviolet (EUV) mask, an EUV radiation source and an illuminator. The process also includes exposing the EUV mask by a radiation, originating from the EUV radiation source and directed by the illuminator, with a less-than-three-degree chief ray angle of incidence at the object side (CRAO). The process further includes removing most of the non-diffracted light and collecting and directing the diffracted light and the not removed non-diffracted light by a projection optics box (POB) to expose a target.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: September 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Anthony Yen
  • Patent number: 9442365
    Abstract: A mask and method of fabricating same are disclosed. In an example, a mask includes a substrate, a reflective multilayer coating disposed over the substrate and a patterned absorption layer disposed over the reflective multilayer. The patterned absorption layer has a mask image region and a mask border region. The exemplary mask also includes a mask border frame disposed over the mask border region. The mask border frame has a top surface and a bottom surface. The top surface is not parallel to the bottom surface.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: September 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9442384
    Abstract: The present disclosure is directed towards lithography processes. In one embodiment, a patterned mask is provided. An information of a position of diffraction light (PDL) on a pupil plane of a projection optics box (POB) is used to define as a light-transmitting region of a pupil filter. The patterned mask is exposed by an on-axis illumination (ONI) with partial coherence ? less than 0.3. The pupil filter is used to transmit diffraction light to a target.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: September 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9417534
    Abstract: A lithography process in a lithography system includes loading a mask that includes two mask states defining an integrated circuit (IC) pattern. The IC pattern includes a plurality of main polygons, wherein adjacent main polygons are assigned to different mask states; and a background includes a field in one of the mask states and a plurality of sub-resolution polygons in another of the two mask states. The lithography process further includes configuring an illuminator to generate an illuminating pattern on an illumination pupil plane of the lithography system; configuring a pupil filter on a projection pupil plane of the lithography system with a filtering pattern determined according to the illumination pattern; and performing an exposure process to a target with the illuminator, the mask, and the pupil filter. The exposure process produces diffracted light and non-diffracted light behind the mask and the pupil filter removes most of the non-diffracted light.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 16, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Cheng Lu, Shinn-Sheng Yu, Anthony Yen
  • Patent number: 9412647
    Abstract: A method includes defining a metal pattern layer over a first dielectric layer. The first dielectric layer is disposed over an etch stop layer and the etch stop layer is disposed over a second dielectric layer. A spacer layer is grown over the metal pattern layer and the first dielectric layer. A metal trench is formed with a metal width in the first dielectric layer. A via hole is formed with a via width in the second dielectric layer.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 9405195
    Abstract: The present disclosure provides a method that includes forming a first patternable material layer on a substrate; forming a second patternable material layer over the first patternable material layer; and performing a charged particle beam lithography exposure process to the first patternable material layer and the second patternable material layer, thereby forming a first latent feature in the first patternable material layer and a second latent feature in the second patternable material layer.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Cheng Lu, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen