Abstract: The invention provides an image capture device and an image processing method thereof. The image processing method includes the following steps. First, an image signal source is received by a receiving unit, wherein the image signal source has a plurality of image frames and plurality corresponding image information or plurality of corresponding variable refresh rate (VRR) related information. Next, it is determined whether the image signal source is a VRR signal, and a determination result is generated. A time stamp of each image frame is calculated according to the VRR-related information if the determination result is positive, wherein the time stamps correspond to a dynamic frame interval respectively. Next, the image frames are respectively converted into a corresponding output packet. Finally, the output packets are respectively integrated with their respective time stamps to generate a dynamic frame interval output packet.

Abstract: A video signal conversion method includes: receiving an input signal from a video source; extracting an image metadata from the input signal; determining whether the input signal corresponds to a high dynamic range (HDR) imaging format according to at least one format information of the image metadata and determining whether a video receiver supports the high dynamic range imaging format; in response to the input signal corresponding to the high dynamic range imaging format and the video receiver being not support the high dynamic range imaging format, generating a conversion command; receiving, by a video processor, the conversion command; converting, by the video processor, the input signal into an output signal corresponding to a standard dynamic range (SDR) imaging format according to the conversion command; sending, by the video processor, the output signal to the video receiver; and receiving by the video receiver, the output signal in SDR imaging format.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion method includes: receiving an input signal from a video source; extracting an image metadata from the input signal; determining whether the input signal corresponds to a high dynamic range (HDR) imaging format according to at least one format information of the image metadata and determining whether a video receiver supports the high dynamic range imaging format; in response to the input signal corresponding to the high dynamic range imaging format and the video receiver being not support the high dynamic range imaging format, generating a conversion command; receiving, by a video processor, the conversion command; converting, by the video processor, the input signal into an output signal corresponding to a standard dynamic range (SDR) imaging format according to the conversion command; sending, by the video processor, the output signal to the video receiver; and receiving by the video receiver, the output signal in SDR imaging format.

Abstract: A video signal conversion device includes a front end interface, a rear end interface, a video detector and a video processor. The front end interface is coupled to a video source to receive an input signal. The rear end interface is coupled to a video receiver. The video detector determines whether the input signal corresponds to HDR imaging format. The video detector generates a conversion command in response to the input signal corresponding to HDR imaging format. The video processor is coupled to the front end interface, the rear end interface and the video detector. When the video processor receives the conversion command, the video processor converts the input signal into an output signal with SDR imaging format. The video processor sends the output signal to the video receiver via the rear end interface.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a frontend interface circuit, a FPGA video processor and a backend interface circuit. The frontend interface circuit receives a HDR video input signal from a video transmitting device. The FPGA video processor outputs a SDR first video output signal. A video receiving device receives the first video output signal and a HDR second video output signal from the FPGA video processor through the video bridge controller of the backend interface circuit by PCI-E.

Abstract: A video signal conversion device includes a front end interface, a rear end interface, a video detector and a video processor. The front end interface is coupled to a video source to receive an input signal. The rear end interface is coupled to a video receiver. The video detector determines whether the input signal corresponds to HDR imaging format. The video detector generates a conversion command in response to the input signal corresponding to HDR imaging format. The video processor is coupled to the front end interface, the rear end interface and the video detector. When the video processor receives the conversion command, the video processor converts the input signal into an output signal with SDR imaging format. The video processor sends the output signal to the video receiver via the rear end interface.