Patents by Inventor Yen-Tso Chen
Yen-Tso Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11695439Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a transmit (TX) function through the auxiliary path.Type: GrantFiled: October 19, 2021Date of Patent: July 4, 2023Assignee: MEDIATEK INC.Inventors: Jui-Lin Hsu, Yen-Tso Chen, Hsiang-Yun Chu, Jen-Hao Cheng, Wei-Hsiu Hsu, Tzu-Chin Lin, Chih-Ming Hung, Jing-Hong Conan Zhan
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Publication number: 20230179240Abstract: A semiconductor chip includes a first wireless communication circuit, a second wireless communication circuit, and an auxiliary path. The first wireless communication circuit includes a signal path, wherein the signal path includes a signal node. The second wireless communication circuit includes a mixer and a local oscillator (LO) buffer. The LO buffer is arranged to receive and buffer an LO signal, and is further arranged to provide the LO signal to the mixer. The auxiliary path is arranged to electrically connect the LO buffer to the signal node of the signal path, wherein the LO buffer is reused for a loop-back test function of the first wireless communication circuit through the auxiliary path.Type: ApplicationFiled: February 1, 2023Publication date: June 8, 2023Applicant: MEDIATEK INC.Inventors: Jui-Lin Hsu, Hsiang-Yun Chu, Yen-Tso Chen, Jen-Hao Cheng, Wei-Hsiu Hsu, Tzu-Chin Lin, Chih-Ming Hung, Jing-Hong Conan Zhan
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Patent number: 11601147Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.Type: GrantFiled: October 18, 2021Date of Patent: March 7, 2023Assignee: MEDIATEK INC.Inventors: Jui-Lin Hsu, Hsiang-Yun Chu, Yen-Tso Chen, Jen-Hao Cheng, Wei-Hsiu Hsu, Tzu-Chin Lin, Chih-Ming Hung, Jing-Hong Conan Zhan
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Publication number: 20220140849Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a transmit (TX) function through the auxiliary path.Type: ApplicationFiled: October 19, 2021Publication date: May 5, 2022Applicant: MEDIATEK INC.Inventors: Jui-Lin Hsu, Yen-Tso Chen, Hsiang-Yun Chu, Jen-Hao Cheng, Wei-Hsiu Hsu, Tzu-Chin Lin, Chih-Ming Hung, Jing-Hong Conan Zhan
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Publication number: 20220140848Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.Type: ApplicationFiled: October 18, 2021Publication date: May 5, 2022Applicant: MEDIATEK INC.Inventors: Jui-Lin Hsu, Hsiang-Yun Chu, Yen-Tso Chen, Jen-Hao Cheng, Wei-Hsiu Hsu, Tzu-Chin Lin, Chih-Ming Hung, Jing-Hong Conan Zhan
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Patent number: 10367450Abstract: An oscillator apparatus includes an oscillator core circuit. The oscillator core circuit includes an inverting transconductance amplifier, at least one first capacitor, at least one second capacitor, and a resonator. The at least one first capacitor is connected between an input of the inverting transconductance amplifier and a ground level. The at least one second capacitor is connected between an output of the inverting transconductance amplifier and the ground level. The resonator has a first port connected to the input of the inverting transconductance amplifier and a second port connected to the output of the inverting transconductance amplifier. The first port is decoupled from the second port.Type: GrantFiled: November 7, 2016Date of Patent: July 30, 2019Assignee: MediaTek Inc.Inventors: Hao-Wei Huang, Yen-Tso Chen, Kun-Yin Wang
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Patent number: 10291237Abstract: An oscillator circuit has a reconfigurable oscillator amplifier. The reconfigurable oscillator amplifier is used to be coupled to a resonant circuit in parallel. The reconfigurable oscillator amplifier supports different circuit configurations for different operation modes, respectively. The reconfigurable oscillator amplifier has at least one circuit component shared by the different circuit configurations. The reconfigurable oscillator amplifier employs one of the different circuit configurations under one of the different operation modes.Type: GrantFiled: November 18, 2016Date of Patent: May 14, 2019Assignee: MEDIATEK INC.Inventors: Hao-Wei Huang, Yen-Tso Chen, Song-Yu Yang
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Patent number: 10257464Abstract: The present invention provides a method for processing images in a video. The method includes after providing a plurality of first video images to a server, a plurality of video devices proposing a request message related to a second video image to the server; and the plurality of video devices receiving and displaying the second video image from the server; wherein the server performs a transcoding process on the received plurality of first video images for at least one time to obtain the second video image; wherein a hierarchical structure exists between the server and the plurality of video devices; wherein the second video image comprises the plurality of first video images and a screen layout of the plurality of first video images in the second video image is controlled by a control terminal.Type: GrantFiled: February 5, 2018Date of Patent: April 9, 2019Inventor: Yen-Tso Chen
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Patent number: 10164569Abstract: A signal generator and an associated resonator circuit are provided. The signal generator includes the resonator circuit and a core circuit. The resonator circuit further includes a first inductor (L1), a second inductor (L2), a plurality of capacitors and a switching circuit. The first inductor (L1) has a first terminal (N1) and a third terminal (N3), and the second inductor (L2) has a second terminal (N2) and a fourth terminal (N4). The switching circuit includes a first switch (S1), a second switch (S2), a third switch (S3) and a fourth switch (S4). The core circuit further includes a first inner circuit, a first outer circuit, a second inner circuit, and a second outer circuit. Configurations of these switches are adjustable and resonance caused between these terminals is changed accordingly.Type: GrantFiled: October 13, 2016Date of Patent: December 25, 2018Assignee: MediaTek Inc.Inventor: Yen-Tso Chen
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Publication number: 20180241968Abstract: The present invention provides a method for processing images in a video. The method includes after providing a plurality of first video images to a server, a plurality of video devices proposing a request message related to a second video image to the server; and the plurality of video devices receiving and displaying the second video image from the server; wherein the server performs a transcoding process on the received plurality of first video images for at least one time to obtain the second video image; wherein a hierarchical structure exists between the server and the plurality of video devices; wherein the second video image comprises the plurality of first video images and a screen layout of the plurality of first video images in the second video image is controlled by a control terminal.Type: ApplicationFiled: February 5, 2018Publication date: August 23, 2018Inventor: Yen-Tso Chen
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Publication number: 20170294915Abstract: An oscillator circuit has a reconfigurable oscillator amplifier. The reconfigurable oscillator amplifier is used to be coupled to a resonant circuit in parallel. The reconfigurable oscillator amplifier supports different circuit configurations for different operation modes, respectively. The reconfigurable oscillator amplifier has at least one circuit component shared by the different circuit configurations. The reconfigurable oscillator amplifier employs one of the different circuit configurations under one of the different operation modes.Type: ApplicationFiled: November 18, 2016Publication date: October 12, 2017Inventors: Hao-Wei Huang, Yen-Tso Chen, Song-Yu Yang
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Publication number: 20170170784Abstract: An oscillator apparatus includes an oscillator core circuit. The oscillator core circuit includes an inverting transconductance amplifier, at least one first capacitor, at least one second capacitor, and a resonator. The at least one first capacitor is connected between an input of the inverting transconductance amplifier and a ground level. The at least one second capacitor is connected between an output of the inverting transconductance amplifier and the ground level. The resonator has a first port connected to the input of the inverting transconductance amplifier and a second port connected to the output of the inverting transconductance amplifier. The first port is decoupled from the second port.Type: ApplicationFiled: November 7, 2016Publication date: June 15, 2017Inventors: Hao-Wei Huang, Yen-Tso Chen, Kun-Yin Wang
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Publication number: 20170141728Abstract: A signal generator and an associated resonator circuit are provided. The signal generator includes the resonator circuit and a core circuit. The resonator circuit further includes a first inductor (L1), a second inductor (L2), a plurality of capacitors and a switching circuit. The first inductor (L1) has a first terminal (N1) and a third terminal (N3), and the second inductor (L2) has a second terminal (N2) and a fourth terminal (N4). The switching circuit includes a first switch (S1), a second switch (S2), a third switch (S3) and a fourth switch (S4). The core circuit further includes a first inner circuit, a first outer circuit, a second inner circuit, and a second outer circuit. Configurations of these switches are adjustable and resonance caused between these terminals is changed accordingly.Type: ApplicationFiled: October 13, 2016Publication date: May 18, 2017Inventor: Yen-Tso Chen
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Patent number: 8988487Abstract: The present invention discloses a cloud video exchanging conference device. The cloud video conference device includes at least one multi-point control unit, corresponding to at least one representative number, connecting to the Internet via at least one Internet Protocol address; a backend management module, for corresponding the at least one representative number to the at least one Internet Protocol address; and at least one video conference operating module, for obtaining a corresponding specific Internet Protocol address among the at least one Internet Protocol address via the backend management module according to a specific representative number among the at least one representative number, to connect to a corresponding specific multi-point control unit among the at least one multi-point control unit for video exchanging conference.Type: GrantFiled: May 30, 2013Date of Patent: March 24, 2015Inventor: Yen-Tso Chen
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Publication number: 20140225981Abstract: The present invention discloses a cloud video exchanging conference device. The cloud video conference device includes at least one multi-point control unit, corresponding to at least one representative number, connecting to the Internet via at least one Internet Protocol address; a backend management module, for corresponding the at least one representative number to the at least one Internet Protocol address; and at least one video conference operating module, for obtaining a corresponding specific Internet Protocol address among the at least one Internet Protocol address via the backend management module according to a specific representative number among the at least one representative number, to connect to a corresponding specific multi-point control unit among the at least one multi-point control unit for video exchanging conference.Type: ApplicationFiled: May 30, 2013Publication date: August 14, 2014Inventor: Yen-Tso Chen
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Patent number: 8599997Abstract: A multiple-modulus divider and an associated control method are provided. The multiple-modulus divider includes a divisor loader, a multiple-modulus dividing circuit and a modulus controller. The divisor loader downloads a divisor when a download signal indicates a start of a division period. The multiple-modulus circuit includes a plurality of cascaded divisors, and provides an output frequency according to an input frequency and the divisor. The dividers respectively output a plurality of modulus output signals, and each is operable under either a close-loop state or an open-loop state. The modulus controller selects and controls one of the dividers according to the divisor, and ensures the selected divider is maintained at the open-loop state when the division period ends. The download signal corresponds to one of the modulus output signals.Type: GrantFiled: July 24, 2012Date of Patent: December 3, 2013Assignee: MStar Semiconductor, Inc.Inventors: Yen-Tso Chen, Jian-Yu Ding
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Publication number: 20130050393Abstract: The present invention provides an improved multi-channel external video compression card comprising a plurality of display connecting ports and a signal compression module; wherein each one of said display connecting ports comprises a signal conversion module for signal conversion and the signal compression module comprises a signal connecting port with a USB interface such that synchronized or simultaneous two-way video conference can be achieved and can be individually displayed on each user's screen in the video conference and such that an improved method of external connection to the computer for the users can be advantageously provided.Type: ApplicationFiled: August 13, 2012Publication date: February 28, 2013Inventor: YEN-TSO CHEN
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Patent number: 8385456Abstract: A differential radio frequency signal transmitter is provided. The differential radio frequency signal transmitter includes an oscillator, a modulator and an amplifier module. The oscillator generates a pair of differential oscillation signals. The modulator generates a pair of differential modulated signals according to an input signal and the pair of differential oscillation signals. The input signal is a digital signal. When the input signal is at a first state, the modulator outputs the pair of differential oscillation signals as the pair of differential modulated signals, and when the input signal is at a second state, the modulator outputs a constant voltage signal as the pair of differential modulated signals. The amplifier module receives and amplifies the pair of differential modulated signals and generates a pair of differential radio frequency signals, accordingly.Type: GrantFiled: October 1, 2009Date of Patent: February 26, 2013Assignee: National Taiwan UniversityInventors: Jr-I Lee, Yen-Lin Huang, Yen-Tso Chen, Chia-Jung Chang
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Publication number: 20130027111Abstract: A multiple-modulus divider and an associated control method are provided. The multiple-modulus divider includes a divisor loader, a multiple-modulus dividing circuit and a modulus controller. The divisor loader downloads a divisor when a download signal indicates a start of a division period. The multiple-modulus circuit includes a plurality of cascaded divisors, and provides an output frequency according to an input frequency and the divisor. The dividers respectively output a plurality of modulus output signals, and each is operable under either a close-loop state or an open-loop state. The modulus controller selects and controls one of the dividers according to the divisor, and ensures the selected divider is maintained at the open-loop state when the division period ends. The download signal corresponds to one of the modulus output signals.Type: ApplicationFiled: July 24, 2012Publication date: January 31, 2013Applicant: MStar Semiconductor, Inc.Inventors: YEN-TSO CHEN, Jian-Yu Ding
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Publication number: 20110007128Abstract: A video capturing device includes a USB transmission interface interconnected with a computer to transmit information and a data processing device primarily formed by an H.264 coding module and an audio coding module. Through the H.264 coding module, the audio coding module and a real-time coding-decoding module in the computer, digital video information, an audio signal, a dynamic data and a static data are received respectively. These data are encoded, compressed, and then transmitted through the USB transmission interface to the computer and then to a remote server. When the compressed information from the remote server is received by the computer, the information is decoded by an H.264 decoding module and an audio decoding module in the computer or the data processing device and then transmitted to an external device. By this external data processing device, the present invention can be carried conveniently and applied to any kinds of computers.Type: ApplicationFiled: June 24, 2010Publication date: January 13, 2011Inventor: YEN-TSO CHEN