Patents by Inventor Yeong Seng Hoo

Yeong Seng Hoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8504865
    Abstract: A clock signal may be aligned with a data signal by delaying the signals relative to each other until an edge of one signal aligns with an edge of the other signal, and then causing an inversion of the clock signal. A further variation may limit the relative delay period to one-half clock cycle and may use a double inversion of the clock signal.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: August 6, 2013
    Assignee: eASIC Corporation
    Inventors: Choon Keat Khor, Yeong Seng Hoo, Soon Chieh Lim
  • Publication number: 20080263381
    Abstract: A clock signal may be aligned with a data signal by delaying the signals relative to each other until an edge of one signal aligns with an edge of the other signal, and then causing an inversion of the clock signal. A further variation may limit the relative delay period to one-half clock cycle and may use a double inversion of the clock signal.
    Type: Application
    Filed: April 20, 2007
    Publication date: October 23, 2008
    Applicant: EASIC CORPORATION
    Inventors: Choon Keat Khor, Yeong Seng Hoo, Soon Chieh Lim