Patents by Inventor Yezdi N. Dordi
Yezdi N. Dordi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11424158Abstract: A method comprises depositing a barrier layer on a dielectric layer to prevent oxidation of a metal layer to be deposited by electroplating due to an oxide present in the dielectric layer and depositing a doped liner layer on the barrier layer to bond with the metal layer to be deposited on the liner layer by the electroplating. The dopant forms a protective passivation layer on a surface of the liner layer and dissolves during the electroplating so that the metal layer deposited on the liner layer by the electroplating bonds with the liner layer. The dopant reacts with the dielectric layer and forms a layer of a compound between the barrier layer and the dielectric layer. The compound layer prevents oxidation of the barrier layer and the liner layer due to the oxide present in the dielectric layer and adheres the barrier layer to the dielectric layer.Type: GrantFiled: August 4, 2020Date of Patent: August 23, 2022Assignee: LAM RESEARCH CORPORATIONInventors: Yezdi N. Dordi, Aniruddha Joi, Steven James Madsen, Dries Dictus
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Publication number: 20200365453Abstract: A method comprises depositing a barrier layer on a dielectric layer to prevent oxidation of a metal layer to be deposited by electroplating due to an oxide present in the dielectric layer and depositing a doped liner layer on the barrier layer to bond with the metal layer to be deposited on the liner layer by the electroplating. The dopant forms a protective passivation layer on a surface of the liner layer and dissolves during the electroplating so that the metal layer deposited on the liner layer by the electroplating bonds with the liner layer. The dopant reacts with the dielectric layer and forms a layer of a compound between the barrier layer and the dielectric layer. The compound layer prevents oxidation of the barrier layer and the liner layer due to the oxide present in the dielectric layer and adheres the barrier layer to the dielectric layer.Type: ApplicationFiled: August 4, 2020Publication date: November 19, 2020Inventors: Yezdi N. Dordi, Aniruddha Joi, Steven James Madsen, Dries Dictus
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Patent number: 10741440Abstract: A method comprises depositing a barrier layer on a dielectric layer to prevent oxidation of a metal layer to be deposited by electroplating due to an oxide present in the dielectric layer and depositing a doped liner layer on the barrier layer to bond with the metal layer to be deposited on the liner layer by the electroplating. The dopant forms a protective passivation layer on a surface of the liner layer and dissolves during the electroplating so that the metal layer deposited on the liner layer by the electroplating bonds with the liner layer. The dopant reacts with the dielectric layer and forms a layer of a compound between the barrier layer and the dielectric layer. The compound layer prevents oxidation of the barrier layer and the liner layer due to the oxide present in the dielectric layer and adheres the barrier layer to the dielectric layer.Type: GrantFiled: June 5, 2018Date of Patent: August 11, 2020Assignee: Lam Research CorporationInventors: Yezdi N. Dordi, Aniruddha Joi, Steven James Madsen, Dries Dictus
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Publication number: 20190371659Abstract: A method comprises depositing a barrier layer on a dielectric layer to prevent oxidation of a metal layer to be deposited by electroplating due to an oxide present in the dielectric layer and depositing a doped liner layer on the barrier layer to bond with the metal layer to be deposited on the liner layer by the electroplating. The dopant forms a protective passivation layer on a surface of the liner layer and dissolves during the electroplating so that the metal layer deposited on the liner layer by the electroplating bonds with the liner layer. The dopant reacts with the dielectric layer and forms a layer of a compound between the barrier layer and the dielectric layer. The compound layer prevents oxidation of the barrier layer and the liner layer due to the oxide present in the dielectric layer and adheres the barrier layer to the dielectric layer.Type: ApplicationFiled: June 5, 2018Publication date: December 5, 2019Inventors: Yezdi N. DORDI, Aniruddha JOI, Steven James MADSEN, Dries DICTUS
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Publication number: 20140256142Abstract: A method for etching an etch layer is provided. A glue layer having metallizable terminations is formed over the etch layer. The glue layer is exposed to a patterned light, wherein the metallizable terminations of the glue layer illuminated by the patterned light become unmetallizable. A metal deposition layer is formed on the glue layer, wherein the metal deposition layer only deposits on areas of the glue layer with metallizable terminations of the glue layer. The etch layer is etched through portions of the glue layer without the metal deposition layer.Type: ApplicationFiled: March 8, 2013Publication date: September 11, 2014Applicant: Lam Research CorporationInventor: Yezdi N. DORDI
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Patent number: 8822344Abstract: A method for etching an etch layer is provided. A glue layer having metallizable terminations is formed over the etch layer. The glue layer is exposed to a patterned light, wherein the metallizable terminations of the glue layer illuminated by the patterned light become unmetallizable. A metal deposition layer is formed on the glue layer, wherein the metal deposition layer only deposits on areas of the glue layer with metallizable terminations of the glue layer. The etch layer is etched through portions of the glue layer without the metal deposition layer.Type: GrantFiled: March 8, 2013Date of Patent: September 2, 2014Assignee: Lam Research CorporationInventor: Yezdi N. Dordi
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Publication number: 20140145334Abstract: Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.Type: ApplicationFiled: January 29, 2014Publication date: May 29, 2014Inventors: John BOYD, Fritz REDEKER, Yezdi N. DORDI, Hyungsuk Alexander YOON, Shijian LI
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Patent number: 8524329Abstract: A method for providing electroless plating is provided. An amorphous carbon barrier layer is formed over the low-k dielectric layer by providing a flow a deposition gas, comprising a hydrocarbon, H2, and an oxygen free diluent, forming a plasma from the deposition gas, and stopping the flow of the deposition gas. The amorphous carbon barrier layer is conditioned by providing a flow of a conditioning gas comprising H2 and a diluent, forming a plasma from the conditioning gas, which conditions a top surface of the amorphous carbon barrier layer, and stopping the flow of the conditioning gas. The amorphous carbon barrier layer is functionalized by providing a flow of a functionalizing gas comprising NH3 or H2 and N2, forming a plasma from the functionalizing gas, and stopping the flow of the functionalizing gas. An electroless process is provided to form an electrode over the barrier layer.Type: GrantFiled: December 13, 2011Date of Patent: September 3, 2013Assignee: Lam Research CorporationInventors: Yezdi N. Dordi, Richard P. Janek, Dries Dictus
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Publication number: 20130149461Abstract: A method for providing electroless plating is provided. An amorphous carbon barrier layer is formed over the low-k dielectric layer by providing a flow a deposition gas, comprising a hydrocarbon, H2, and an oxygen free diluent, forming a plasma from the deposition gas, and stopping the flow of the deposition gas. The amorphous carbon barrier layer is conditioned by providing a flow of a conditioning gas comprising H2 and a diluent, forming a plasma from the conditioning gas, which conditions a top surface of the amorphous carbon barrier layer, and stopping the flow of the conditioning gas. The amorphous carbon barrier layer is functionalized by providing a flow of a functionalizing gas comprising NH3 or H2 and N2, forming a plasma from the functionalizing gas, and stopping the flow of the functionalizing gas. An electroless process is provided to form an electrode over the barrier layer.Type: ApplicationFiled: December 13, 2011Publication date: June 13, 2013Applicant: Lam Research CorporationInventors: Yezdi N. DORDI, Richard P. JANEK, Dries DICTUS
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Patent number: 8221608Abstract: Methods for plating substrates are herein defined. One method includes providing a plating assembly having a plating source in a plating fluid and a plating facilitator in the plating fluid, and defining a plating meniscus between the plating source and the plating facilitator. The plating meniscus being contained in a path of the plating assembly. The method further includes traversing a substrate through the path of the plating assembly. The substrate being charged so that plating ions are attracted to a surface of the substrate when the plating meniscus is present on the surface of the substrate, wherein the substrate traversing through the path of the plating assembly enables plating across the surface of the substrate. And, inducing a uniform charge in the path where the plating meniscus is formed, such that charge from the plating source is substantially uniformly directed toward the plating facilitator as the substrate that is charged moves through the path of the plating assembly.Type: GrantFiled: October 6, 2010Date of Patent: July 17, 2012Assignee: Lam Research CorporationInventors: Carl A. Woods, Yezdi N. Dordi, Jacob Wylie, Robert Maraschin
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Patent number: 8084356Abstract: An integrated process for forming metallization layers for electronic devices that use damascene structures that include low-k dielectric and metal. According to one embodiment of the present invention, the integrated process includes planarizing a gapfill metal in low-k dielectric structures, generating a protective layer on the low-k dielectric followed by cleaning the surface of the gapfill metal. Another embodiment of the present invention includes a method of protecting low-k dielectrics such as carbon doped silicon oxide.Type: GrantFiled: September 17, 2008Date of Patent: December 27, 2011Assignee: Lam Research CorporationInventors: Yezdi N. Dordi, Arthur M. Howald
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Publication number: 20110155563Abstract: An electroplating apparatus for depositing a metallic layer on a surface of a wafer is provided. In one example, a proximity head capable of being electrically charged as an anode is placed in close proximity to the surface of the wafer. A plating fluid is provided between the wafer and the proximity head to create localized metallic plating.Type: ApplicationFiled: March 8, 2011Publication date: June 30, 2011Applicant: Lam Research Corp.Inventors: Mike Ravkin, John Boyd, Yezdi N. Dordi, Fred C. Redeker, John M. de Larios
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Patent number: 7947157Abstract: An electroplating apparatus for depositing a metallic layer on a surface of a wafer is provided. In one example, a proximity head capable of being electrically charged as an anode is placed in close proximity to the surface of the wafer. A plating fluid is provided between the wafer and the proximity head to create localized metallic plating.Type: GrantFiled: July 28, 2006Date of Patent: May 24, 2011Assignee: Lam Research CorporationInventors: Mike Ravkin, John Boyd, Yezdi N. Dordi, Fred C. Redeker, John M. de Larios
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Publication number: 20110017605Abstract: Methods for plating substrates are herein defined. One method includes providing a plating assembly having a plating source in a plating fluid and a plating facilitator in the plating fluid, and defining a plating meniscus between the plating source and the plating facilitator. The plating meniscus being contained in a path of the plating assembly. The method further includes traversing a substrate through the path of the plating assembly. The substrate being charged so that plating ions are attracted to a surface of the substrate when the plating meniscus is present on the surface of the substrate, wherein the substrate traversing through the path of the plating assembly enables plating across the surface of the substrate. And, inducing a uniform charge in the path where the plating meniscus is formed, such that charge from the plating source is substantially uniformly directed toward the plating facilitator as the substrate that is charged moves through the path of the plating assembly.Type: ApplicationFiled: October 6, 2010Publication date: January 27, 2011Inventors: Carl A. Woods, Yezdi N. Dordi, Jacob Wylie, Robert Maraschin
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Patent number: 7862693Abstract: An electroplating apparatus for electroplating a surface of a wafer is provided. The wafer is capable of being electrically charged as a cathode. The electroplating apparatus includes a plating head capable of being positioned either over or under the surface of a wafer and capable of being electrically charged as an anode. The plating head is capable of enabling metallic plating between the surface of the wafer and the plating head when the wafer and plating head are charged. The plating head further comprises a voltage sensor pair capable of sensing a voltage present between the plating head and the surface of the wafer, and a controller capable of receiving data from the voltage sensor pair. The data received from the voltage sensor pair is used by the controller to maintain a substantially constant voltage to be applied by the anode when the plating head is placed in positions over the surface of the wafer. A method of electroplating a wafer is also provided.Type: GrantFiled: September 4, 2009Date of Patent: January 4, 2011Assignee: Lam Research CorporationInventors: Yezdi N. Dordi, Fred C. Redeker, John M. Boyd, Robert Maraschin, Carl Woods
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Patent number: 7811423Abstract: A plating assembly for use in plating metallic materials onto a surface of a substrate is provided. The plating assembly comprising a delivery unit having a fluid chamber, a metallic source, and a porous insert. The plating assembly also comprising a receiving unit having a fluid chamber and a metallic receiver. The receiving unit also has a porous insert. The porous insert of the delivery unit being substantially aligned with, and spaced apart from, the porous insert of the receiving unit. The metallic receiver being substantially aligned with the porous insert of the delivery unit and a path being defined between the delivery unit and the receiving unit. Wherein a plating meniscus is capable of being defined in the path between the porous inserts of the delivery unit and the receiving unit and a substrate is capable of being moved through the plating meniscus to enable the plating of metallic materials onto the surface of the substrate. Examples for de-plating are also provided.Type: GrantFiled: October 6, 2006Date of Patent: October 12, 2010Assignee: Lam Research CorporationInventors: Carl A. Woods, Yezdi N. Dordi, Jacob Wylie, Robert Maraschin
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Patent number: 7645364Abstract: An electroplating apparatus for electroplating a surface of a wafer is provided. The wafer is capable of being electrically charged as a cathode. The electroplating apparatus includes a plating head capable of being positioned either over or under the surface of a wafer and capable of being electrically charged as an anode. The plating head is capable of enabling metallic plating between the surface of the wafer and the plating head when the wafer and plating head are charged. The plating head further comprises a voltage sensor pair capable of sensing a voltage present between the plating head and the surface of the wafer, and a controller capable of receiving data from the voltage sensor pair. The data received from the voltage sensor pair is used by the controller to maintain a substantially constant voltage to be applied by the anode when the plating head is placed in positions over the surface of the wafer. A method of electroplating a wafer is also provided.Type: GrantFiled: June 30, 2004Date of Patent: January 12, 2010Assignee: Lam Research CorporationInventors: Yezdi N. Dordi, Fred C. Redeker, John M. Boyd, Robert Maraschin, Carl Woods
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Publication number: 20090321250Abstract: An electroplating apparatus for electroplating a surface of a wafer is provided. The wafer is capable of being electrically charged as a cathode. The electroplating apparatus includes a plating head capable of being positioned either over or under the surface of a wafer and capable of being electrically charged as an anode. The plating head is capable of enabling metallic plating between the surface of the wafer and the plating head when the wafer and plating head are charged. The plating head further comprises a voltage sensor pair capable of sensing a voltage present between the plating head and the surface of the wafer, and a controller capable of receiving data from the voltage sensor pair. The data received from the voltage sensor pair is used by the controller to maintain a substantially constant voltage to be applied by the anode when the plating head is placed in positions over the surface of the wafer. A method of electroplating a wafer is also provided.Type: ApplicationFiled: September 4, 2009Publication date: December 31, 2009Applicant: Lam Research Corp.Inventors: Yezdi N. Dordi, Fred C. Redeker, John M. Boyd, Robert Maraschin, Carl Woods
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Publication number: 20090087980Abstract: An integrated process for forming metallization layers for electronic devices that use damascene structures that include low-k dielectric and metal. According to one embodiment of the present invention, the integrated process includes planarizing a gapfill metal in low-k dielectric structures, generating a protective layer on the low-k dielectric followed by cleaning the surface of the gapfill metal. Another embodiment of the present invention includes a method of protecting low-k dielectrics such as carbon doped silicon oxide.Type: ApplicationFiled: September 17, 2008Publication date: April 2, 2009Inventors: Yezdi N. DORDI, Arthur M. Howald
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Publication number: 20080296166Abstract: A plating assembly for use in plating metallic materials onto a surface of a substrate is provided. The plating assembly comprising a delivery unit having a fluid chamber, a metallic source, and a porous insert. The plating assembly also comprising a receiving unit having a fluid chamber and a metallic receiver. The receiving unit also has a porous insert. The porous insert of the delivery unit being substantially aligned with, and spaced apart from, the porous insert of the receiving unit. The metallic receiver being substantially aligned with the porous insert of the delivery unit and a path being defined between the delivery unit and the receiving unit. Wherein a plating meniscus is capable of being defined in the path between the porous inserts of the delivery unit and the receiving unit and a substrate is capable of being moved through the plating meniscus to enable the plating of metallic materials onto the surface of the substrate. Examples for de-plating are also provided.Type: ApplicationFiled: October 6, 2006Publication date: December 4, 2008Inventors: Carl A. Woods, Yezdi N. Dordi, Jacob Wylie, Robert Maraschin