Patents by Inventor Yi-Chien Chang

Yi-Chien Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942543
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Publication number: 20240096998
    Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin LIANG, Chij-chien CHI, Yi-Ying LIU, Chia-Hung CHU, Hsu-Kai CHANG, Cheng-Wei CHANG, Chein-Shun LIAO, Keng-chu LIN, KAi-Ting HUANG
  • Patent number: 9099625
    Abstract: A light emitting diode package includes a metallic frame, and an LED chip disposed on the metallic frame. The metallic frame includes first and second metal plates arranged side by side with a space therebetween, and two support arms extending integrally and respectively from two opposite ends of the second metal plate to a level higher than the second top surface and that further extend toward the first metal plate at a level higher than the first top surface crossing the space. The support arms are not in contact with the first metal plate. An encapsulant encapsulates the metallic frame and the LED chip. At least a region of the encapsulant that covers the LED chip is transparent.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: August 4, 2015
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite- On Technology Corp.
    Inventors: Yi-Chien Chang, Chen-Hsiu Lin, Meng-Sung Chou
  • Patent number: 8829561
    Abstract: The present invention relates to an LED device, which includes a metallic frame, an LED chip, and a packaging body. The metallic frame includes a first lead frame and a second lead frame. The first lead frame has a protruding portion extending toward the second lead frame, while the second lead frame has a notch formed correspondingly to the protruding portion. An electrically insulated region is cooperatively defined by the first and second lead frames. The metallic frame defines at least one blind hole in proximate to the electrically insulated region. The LED chip is electrically connected to the first and second lead frames. The packaging body has a base portion encapsulating the metallic frame and a light-permitting portion arranged above the LED chip.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 9, 2014
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Publication number: 20140217446
    Abstract: A light emitting diode package includes a metallic frame, and an LED chip disposed on the metallic frame. The metallic frame includes first and second metal plates arranged side by side with a space therebetween, and two support arms extending integrally and respectively from two opposite ends of the second metal plate to a level higher than the second top surface and that further extend toward the first metal plate at a level higher than the first top surface crossing the space. The support arms are not in contact with the first metal plate. An encapsulant encapsulates the metallic frame and the LED chip. At least a region of the encapsulant that covers the LED chip is transparent.
    Type: Application
    Filed: January 27, 2014
    Publication date: August 7, 2014
    Applicants: LITE-ON TECHNOLOGY CORP., LITE-ON ELECTRONICS (GUANGZHOU) LIMITED
    Inventors: YI-CHIEN CHANG, CHEN-HSIU LIN, MENG-SUNG CHOU
  • Patent number: 8729586
    Abstract: A light-emitting diode device includes: a substrate; an upper metal film disposed on an upper surface of the substrate, and including a chip-mounting region and a plurality of conductive pad regions; two first light-emitting chips and two second light-emitting chips disposed on the chip-mounting region, the first and second light-emitting chips being disposed alternately, two of the first and second light-emitting chips being opposite to each other; a fluorescent layer coated on the first light-emitting chips; and a lens disposed on the substrate to cover the first and second light-emitting chips and the fluorescent layer.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: May 20, 2014
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.
    Inventors: Chia-Hao Wu, Chen-Hsiu Lin, Ming-Kun Weng, Yi-Chien Chang
  • Publication number: 20130256733
    Abstract: The present invention relates to an LED device, which includes a metallic frame, an LED chip, and a packaging body. The metallic frame includes a first lead frame and a second lead frame. The first lead frame has a protruding portion extending toward the second lead frame, while the second lead frame has a notch formed correspondingly to the protruding portion. An electrically insulated region is cooperatively defined by the first and second lead frames. The metallic frame defines at least one blind hole in proximate to the electrically insulated region. The LED chip is electrically connected to the first and second lead frames. The packaging body has a base portion encapsulating the metallic frame and a light-permitting portion arranged above the LED chip.
    Type: Application
    Filed: September 14, 2012
    Publication date: October 3, 2013
    Applicants: LITE-ON TECHNOLOGY CORPORATION, SILITEK ELECTRONIC (GUANGZHOU) CO., LTD.
    Inventors: CHEN-HSIU LIN, YI-CHIEN CHANG
  • Publication number: 20130105835
    Abstract: A light-emitting diode device includes: a substrate; an upper metal film disposed on an upper surface of the substrate, and including a chip-mounting region and a plurality of conductive pad regions; two first light-emitting chips and two second light-emitting chips disposed on the chip-mounting region, the first and second light-emitting chips being disposed alternately, two of the first and second light-emitting chips being opposite to each other; a fluorescent layer coated on the first light-emitting chips; and a lens disposed on the substrate to cover the first and second light-emitting chips and the fluorescent layer.
    Type: Application
    Filed: July 26, 2012
    Publication date: May 2, 2013
    Applicants: LITE-ON TECHNOLOGY CORP., SILITEK ELECTRONIC (GUANGZHOU) CO., LTD.
    Inventors: CHIA-HAO WU, CHEN-HSIU LIN, MING-KUN WENG, YI-CHIEN CHANG
  • Patent number: D674357
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 15, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Patent number: D674358
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 15, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Patent number: D674359
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 15, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Patent number: D674360
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 15, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Patent number: D674361
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 15, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Patent number: D674362
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 15, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi Chien Chang
  • Patent number: D674363
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 15, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corporation
    Inventors: Chen-Hsiu Lin, Yi-Chien Chang
  • Patent number: D674757
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: January 22, 2013
    Assignees: Silitek Electronics (Guangzhou) Co., Ltd., Lite-On Technology Corp.
    Inventors: Chia-Hao Wu, Chen-Hsiu Lin, Ming-Kun Weng, Yi-Chien Chang
  • Patent number: D674758
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: January 22, 2013
    Assignees: Silitek Electronic (Guangzhou) Co., Ltd., Lite-On Technology Corp.
    Inventors: Chia-Hao Wu, Chen-Hsiu Lin, Ming-Kun Weng, Yi-Chien Chang