Abstract: A method for forming a TFT includes providing a substrate, a gate electrode on the substrate, an electrically insulating layer on the substrate to totally cover the gate electrode, a channel layer on the electrically insulating layer, a first photoresist pattern on the channel layer, a metal layer on the electrically insulating layer, the channel layer and the first photoresist layer, and a second photoresist pattern on the metal layer. A middle portion of the metal layer is then removed to form a source electrode and a drain electrode and to expose the first photoresist pattern and a portion of the channel layer between the first and second photoresist patterns. The exposed portion of the channel layer is then processed to have its electrical conductivity be lowered to thereby reduce a hot-carrier effect of the channel layer.

Abstract: A thin film transistor (TFT) includes a substrate, a TFT formed on the substrate, and a passivation layer formed on the TFT. The TFT includes a gate, a source, a drain, and a channel layer. The source and the drain are respectively located at opposite sides of the channel layer. The channel layer includes oxygen ions which are implanted into the channel layer by an oxygen implanting process performed in an environment having an air pressure greater than a standard atmospheric pressure.

Abstract: A thin film transistor includes a first gate electrode located on a base, a second gate electrode located on the base, an insulating layer, a source electrode, a drain electrode, and a channel layer. The insulating layer covers the base, the first gate electrode, and the second gate electrode. The second gate electrode is insulated from the first gate electrode. The channel layer includes a first portion and a second portion sandwiched between the first portion and the insulating layer. A conductivity of the second portion is larger than a conductivity of the first portion. The first portion includes a first region facing the first gate electrode and a second region facing the second gate electrode. The source electrode is electrically connected to the first region, and the drain electrode is electrically connected to the second region.

Abstract: A method for forming a TFT includes providing a substrate, a gate electrode on the substrate, an electrically insulating layer on the substrate to totally cover the gate electrode, a channel layer on the electrically insulating layer, a first photoresist pattern on the channel layer, a metal layer on the electrically insulating layer, the channel layer and the first photoresist layer, and a second photoresist pattern on the metal layer. A middle portion of the metal layer is then removed to form a source electrode and a drain electrode and to expose the first photoresist pattern and a portion of the channel layer between the first and second photoresist patterns. The exposed portion of the channel layer is then processed to have its electrical conductivity be lowered to thereby reduce a hot-carrier effect of the channel layer.

Abstract: A thin film transistor can include a substrate, a gate electrode on the substrate, a first electrode located on the substrate and surrounded by the gate electrode, a second electrode located on the first electrode and surrounded by the gate electrode, and a channel layer located between the first electrode and the second electrode. The gate electrode can include a first margin metal layer on the substrate and a second metal layer located on the first margin metal layer. A method for manufacturing the thin film transistor is also provided.

Abstract: A thin film transistor includes a gate, a source, a drain, a channel layer, and a shielding layer. The shielding layer, the source, and the drain are located on a same layer. The shielding layer is located on the channel layer and is between the source and the drain to prevent light from being transmitted to the channel layer.

Abstract: A thin film transistor (TFT) array substrate of a liquid crystal display (LCD) panel includes a first substrate, a gate located on the first substrate, a gate insulation layer located on the first substrate and covers the gate and the first substrate, a source layer located on the gate insulation layer to correspond to the gate, an etching stopping layer located on the source layer, and a source and a drain located on the etching stopping layer. The etching stopping layer is made of color photoresist.

Abstract: A method of manufacturing a thin film transistor substrate is provided, including a first photoresist pattern covers a channel during a process of etching a second photoresist pattern and protects the channel. Thus, an etching stop layer is not required.

Abstract: A TFT array substrate includes a plurality of scan lines, a plurality of date lines, a plurality of pixels, a first TFT, and a second TFT. The number of scan lines includes a first scan line. The date lines are insulated with the scan lines include a first date line and a second date line. The first date line is insulated and at least partly covering the second date line. The pixels are defined by two adjacent scan lines and two adjacent date lines. The first TFT is configured to drive a first pixel at the first side of the first scan line and being coupled with the first scan line and the first date line. The second TFT is configured to drive a second pixel at the second side of the first scan line and being coupled with the first scan line and the second date line.

Abstract: A manufacturing method of display array substrate is provided. The method includes depositing a first metal layer on a substrate and defining a peripheral area and a display area, coating a photo-resist layer on the first metal layer located in the peripheral area, anodizing the first metal layer to a first metal oxide layer with the photo-resist layer as a mask, patterning the first metal oxide layer located in the display area to a gate insulator, removing the photo-resist layer to expose the first metal layer in the peripheral area, forming a channel layer on the gate insulator, and depositing a second metal layer and patterning the second metal layer located in the display area to form a source electrode and a drain electrode.

Abstract: Method for manufacturing a thin film transistor liquid crystal display is provided. A substrate is provided. A gate electrode, a source electrode, a drain electrode, and a passivation film are formed on the substrate in sequence. The passivation film has a contact hole to expose a part of the drain electrode. A conductive layer is formed by coating nano metal material on the passivation film and in the contract hole from which the drain electrode is exposed. A pixel electrode is formed by patterning the conductive layer.

Abstract: A manufacturing method of a thin film transistor includes hard-baking and etching processes for a stop layer. Two through holes are exposed and developed in a photoresistor layer, in which a distance between the two through holes is substantially equal to the channel length of the thin film transistor. Further, the etching stop layer is dry-etched to obtain the thin film transistor having an expected channel length.

Abstract: An array substrate for a liquid crystal display device includes a first storage capacitor and a second storage capacitor for increased capacitance. The first storage capacitor is formed by a first common electrode and a pixel electrode. The second storage capacitor is formed by a second common electrode and the pixel electrode.

Abstract: A thin film transistor includes a gate electrode, a gate insulating layer, a channel layer, an etching stop layer, two contact holes, a source, and a drain. The gate insulating layer covers the gate electrode. The channel layer is arranged on the gate insulating layer corresponding to the gate electrode. The etching stop layer covers the channel layer and includes an organic stop layer and a hard mask layer, the hard mask layer is located on a surface of the organic stop layer opposite to the channel layer to enhance a hardness of the organic stop layer. The two contact holes pass through the etching stop layer. The source connects to the channel via one contact hole, and the drain connects to the channel via the other contact hole.

Abstract: A manufacturing method of a thin film transistor includes hard-baking and etching processes for a stop layer. Two through holes are exposed and developed in a photoresistor layer, in which a distance between the two through holes is substantially equal to the channel length of the thin film transistor. Further, the etching stop layer is dry-etched to obtain the thin film transistor having an expected channel length.

Abstract: Method for manufacturing a thin film transistor liquid crystal display is provided. A substrate is provided. A gate electrode, a source electrode, a drain electrode, and a passivation film are formed on the substrate in sequence. The passivation film has a contact hole to expose a part of the drain electrode. A conductive layer is formed by coating nano metal material on the passivation film and in the contract hole from which the drain electrode is exposed. A pixel electrode is formed by patterning the conductive layer.