Patents by Inventor Yi-Jyun CHEN

Yi-Jyun CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11018182
    Abstract: A pixel structure includes a light emitting diode chip and a light blocking structure. The light emitting diode chip includes a P-type semiconductor layer, an active layer, an N-type semiconductor layer, a first electrode, and K second electrodes. The active layer is located on the P-type semiconductor layer. The N-type semiconductor layer is located on the active layer. The N-type semiconductor layer has a first top surface that is distant from the active layer. The first electrode is electrically connected to the P-type semiconductor layer. The light blocking structure is located in the light emitting diode chip and defines K sub-pixel regions. The active layer and the N-type semiconductor layer are divided into K sub-portions respectively corresponding to the K sub-pixel regions by the light blocking structure. The K sub-pixel regions share the P-type semiconductor layer.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: May 25, 2021
    Assignee: Lextar Electronics Corporation
    Inventors: Yi-Jyun Chen, Li-Cheng Yang, Yu-Chun Lee, Shiou-Yi Kuo, Chih-Hao Lin
  • Publication number: 20190131342
    Abstract: A pixel structure includes a light emitting diode chip and a light blocking structure. The light emitting diode chip includes a P-type semiconductor layer, an active layer, an N-type semiconductor layer, a first electrode, and K second electrodes. The active layer is located on the P-type semiconductor layer. The N-type semiconductor layer is located on the active layer. The N-type semiconductor layer has a first top surface that is distant from the active layer. The first electrode is electrically connected to the P-type semiconductor layer. The light blocking structure is located in the light emitting diode chip and defines K sub-pixel regions. The active layer and the N-type semiconductor layer are divided into K sub-portions respectively corresponding to the K sub-pixel regions by the light blocking structure. The K sub-pixel regions share the P-type semiconductor layer.
    Type: Application
    Filed: October 25, 2018
    Publication date: May 2, 2019
    Inventors: Yi-Jyun CHEN, Li-Cheng YANG, Yu-Chun LEE, Shiou-Yi KUO, Chih-Hao LIN
  • Patent number: 9812432
    Abstract: An LED chip package includes a substrate having a metal terminal (gold finger structure). A LED chip set is composed of a plurality of LED chips formed in one piece, and has a plurality of light-emitting areas which are separated from each other. The LED chip set is disposed on the substrate and electrically connected to the metal terminal.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: November 7, 2017
    Assignee: Lextar Electronics Corporation
    Inventors: Yi-Jyun Chen, Chih-Hao Lin
  • Patent number: 9659914
    Abstract: A light-emitting diode chip package is provided. The light-emitting diode chip package includes a substrate; a light-emitting diode chip set (LED chip set) disposed over the substrate, wherein the LED chip set is formed by a plurality of light-emitting diode chips (LED chips) in one piece; and at least two electrodes disposed over the substrate and electrically connected to the LED chip set.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: May 23, 2017
    Assignee: Lextar Electronics Corporation
    Inventors: Yi-Jyun Chen, Chih-Hao Lin, Hsin-Lun Su, Fang-Chang Hsueh
  • Publication number: 20170084586
    Abstract: An LED chip package includes a substrate having a metal terminal (gold finger structure). A LED chip set is composed of a plurality of LED chips formed in one piece, and has a plurality of light-emitting areas which are separated from each other. The LED chip set is disposed on the substrate and electrically connected to the metal terminal.
    Type: Application
    Filed: May 23, 2016
    Publication date: March 23, 2017
    Inventors: Yi-Jyun CHEN, Chih-Hao LIN
  • Publication number: 20160365493
    Abstract: A light-emitting diode device includes a shell with a recess, wherein the shell does not contain metal oxide. A plurality of lead frames extends from the bottom of the recess to the outside of the shell. At least an UV light-emitting diode (LED) chip is disposed on the bottom of the recess and is electrically connected to the lead frames, wherein the UV LED chip has a wavelength range of 200 nm-400 nm. In addition, an encapsulation adhesive fills the recess to cover the UV LED chip.
    Type: Application
    Filed: February 25, 2016
    Publication date: December 15, 2016
    Inventors: Hsin-Lun SU, Chih-Hao LIN, Fang-Chang HSUEH, Tzong-Liang TSAI, Yi-Jyun CHEN
  • Publication number: 20160300821
    Abstract: A light-emitting diode chip package is provided. The light-emitting diode chip package includes a substrate; a light-emitting diode chip set (LED chip set) disposed over the substrate, wherein the LED chip set is formed by a plurality of light-emitting diode chips (LED chips) in one piece; and at least two electrodes disposed over the substrate and electrically connected to the LED chip set.
    Type: Application
    Filed: June 17, 2016
    Publication date: October 13, 2016
    Inventors: Yi-Jyun Chen, Chih-Hao Lin, Hsin-Lun Su, Fang-Chang Hsueh
  • Publication number: 20160247787
    Abstract: A light-emitting diode chip package is provided. The light-emitting diode chip package includes a substrate; a light-emitting diode chip set (LED chip set) disposed over the substrate, wherein the LED chip set is formed by a plurality of light-emitting diode chips (LED chips) in one piece; and at least two electrodes disposed over the substrate and electrically connected to the LED chip set.
    Type: Application
    Filed: August 5, 2015
    Publication date: August 25, 2016
    Inventors: Yi-Jyun Chen, Chih-Hao Lin, Hsin-Lun Su, Fang-Chang Hsueh
  • Patent number: 9214443
    Abstract: The present invention provides a eutectic solder structure for a chip including a substrate and a solder structure on the substrate. The solder structure includes an alternate lamination of a plurality of first metal layers and a plurality of second metal layers, wherein each second metal layer has a continuous region and a plurality of openings and the melting point of the plurality of second metal layers is higher than that of the plurality of first metal layers. The eutectic solder structure for a chip also includes a chip on the solder structure, wherein the chip is bonded to the substrate by a eutectic reaction of the solder structure.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: December 15, 2015
    Assignee: Lextar Electronics Corporation
    Inventor: Yi-Jyun Chen
  • Patent number: 9202771
    Abstract: A semiconductor chip structure including a semiconductor chip having a pair of electrodes is disclosed. The electrodes have different conductivity types for electrical connection, respectively. A thermoelectric cooling material layer is disposed within each of the pair of electrodes, respectively.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: December 1, 2015
    Assignee: Lextar Electronics Corporation
    Inventor: Yi-Jyun Chen
  • Publication number: 20150108650
    Abstract: The present invention provides a eutectic solder structure for a chip including a substrate and a solder structure on the substrate. The solder structure includes an alternate lamination of a plurality of first metal layers and a plurality of second metal layers, wherein each second metal layer has a continuous region and a plurality of openings and the melting point of the plurality of second metal layers is higher than that of the plurality of first metal layers. The eutectic solder structure for a chip also includes a chip on the solder structure, wherein the chip is bonded to the substrate by a eutectic reaction of the solder structure.
    Type: Application
    Filed: May 7, 2014
    Publication date: April 23, 2015
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventor: Yi-Jyun CHEN
  • Publication number: 20150097207
    Abstract: A semiconductor chip structure including a semiconductor chip having a pair of electrodes is disclosed. The electrodes have different conductivity types for electrical connection, respectively. A thermoelectric cooling material layer is disposed within each of the pair of electrodes, respectively.
    Type: Application
    Filed: May 6, 2014
    Publication date: April 9, 2015
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventor: Yi-Jyun CHEN