Patents by Inventor YI-NUNG LIN

YI-NUNG LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955865
    Abstract: A three-axis voice coil motor including a base, a spherical bearing, a magnetic component, an X-coil group, a Y-coil group, and at least one Z-coil group is provided. The base has a supporting pole. The spherical bearing is rotatably sleeved around the supporting pole. The magnetic component is securely sleeved around the spherical bearing and the magnetic component rotates along with the spherical bearing. The X-coil group is disposed around the magnetic component along an X-axial direction passing through the spherical bearing, and the X-coil group has first gaps. The Y-coil group is disposed around the magnetic component along a Y-axial direction passing through the spherical bearing, and the Y-coil group has second gaps. The Z-coil group is disposed around the magnetic component along a Z-axial direction passing through the spherical bearing.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: April 9, 2024
    Assignee: National Cheng-Kung University
    Inventors: Chien-Sheng Liu, Yi-Hsuan Lin, Chiu-Nung Yeh
  • Publication number: 20230233013
    Abstract: A temperature controlling structure and a filter assembly including the same are provided, where the temperature controlling structure includes a bottom portion and a surrounding portion connected to the bottom portion, the bottom portion is configured for a filter cup detachably disposed thereon so that the filter cup is surrounded by an accommodation space defined by the surrounding portion and the bottom portion.
    Type: Application
    Filed: June 29, 2022
    Publication date: July 27, 2023
    Inventors: Chih-Kang CHEN, Yu Tao KAO, Chien HUANG, Yi-Nung LIN
  • Patent number: 11152370
    Abstract: A memory structure including first and second transistors, an isolation structure and a capacitor and a manufacturing method thereof are provided. The first and second transistors are disposed on the substrate. The isolation structure is disposed in the substrate between the first and second transistors. The capacitor is disposed between the first and second transistors. The capacitor includes a body portion and first and second extension portions. The first and second extensions are extended from the body portion into the substrate at two sides of the isolation structure and connected to the source/drain regions of the first and the second transistors, respectively. The widths of first and second extension portions are decreased downward from a top surface of the isolation structure.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: October 19, 2021
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Yu-An Chen, Shih-Siang Chen, Shih-Ping Lee, Yi-Nung Lin, Po-Yi Wu, Chen-Tso Han, Bo-An Tsai
  • Publication number: 20200357801
    Abstract: A memory structure including first and second transistors, an isolation structure and a capacitor and a manufacturing method thereof are provided. The first and second transistors are disposed on the substrate. The isolation structure is disposed in the substrate between the first and second transistors. The capacitor is disposed between the first and second transistors. The capacitor includes a body portion and first and second extension portions. The first and second extensions are extended from the body portion into the substrate at two sides of the isolation structure and connected to the source/drain regions of the first and the second transistors, respectively. The widths of first and second extension portions are decreased downward from a top surface of the isolation structure.
    Type: Application
    Filed: July 12, 2019
    Publication date: November 12, 2020
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Yu-An Chen, Shih-Siang Chen, Shih-Ping Lee, Yi-Nung Lin, Po-Yi Wu, Chen-Tso Han, Bo-An Tsai
  • Patent number: 10170403
    Abstract: An ameliorated compound carrier board structure of Flip-Chip Chip-Scale Package has the insulating layer between the carrier board and the substrate in the prior art replaced by an anisotropic conductive film or materials with similar structure. The anisotropic conductive film has conductive particles therein to replace the conductive openings on the insulating layer in the prior art. When compressing the substrate onto the carrier board, the bottom surface of the second electrode pads are compressing the corresponding conductive particles on the second electrical contact pads, causing which to burst, therefore forming high-density compressed areas that conduct the second electrode pads and the second electrical contact pads; the conductive particles outside the high-density compressed area are not burst, forming an insulating film between the substrate and the carrier board; in other words, the anisotropic conductive film provides conduction in a Z direction.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: January 1, 2019
    Assignee: Kinsus Interconnect Technology Corp.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nung Lin
  • Publication number: 20160181188
    Abstract: An ameliorated compound carrier board structure of Flip-Chip Chip-Scale Package has the insulating layer between the carrier board and the substrate in the prior art replaced by an anisotropic conductive film or materials with similar structure. The anisotropic conductive film has conductive particles therein to replace the conductive openings on the insulating layer in the prior art. When compressing the substrate onto the carrier board, the bottom surface of the second electrode pads are compressing the corresponding conductive particles on the second electrical contact pads, causing which to burst, therefore forming high-density compressed areas that conduct the second electrode pads and the second electrical contact pads; the conductive particles outside the high-density compressed area are not burst, forming an insulating film between the substrate and the carrier board: in other words, the anisotropic conductive film provides conduction in a Z direction.
    Type: Application
    Filed: December 17, 2014
    Publication date: June 23, 2016
    Inventors: TING-HAO LIN, CHIAO-CHENG CHANG, YI-NUNG LIN