Patents by Inventor Yi-Shien Mor

Yi-Shien Mor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080099851
    Abstract: Semiconductor devices with dual-metal gate structures and fabrication methods thereof. A semiconductor substrate with a first doped region and a second doped region separated by an insulation layer is provided. A first metal gate stack is formed on the first doped region, and a second metal gate stack is formed on the second doped region. A sealing layer is disposed on sidewalls of the first gate stack and the second gate stack. The first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer. The second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.
    Type: Application
    Filed: October 25, 2006
    Publication date: May 1, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peng-Fu Hsu, Fong-Yu Yen, Yi-Shien Mor, Huan-Just Lin, Ying Jin, Hun-Jan Tao
  • Publication number: 20060231910
    Abstract: A method for forming silicide and a semiconductor device formed thereby. A Si-containing polycrystalline region is converted to an amorphous region, and annealed to form a regrown polycrystalline region having an increased grain size. A silicide layer is formed by reacting a metal and the regrown polycrystalline region having the increased grain size.
    Type: Application
    Filed: April 15, 2005
    Publication date: October 19, 2006
    Inventors: Tung-Heng Hsieh, Chien-Li Cheng, Yi-Shien Mor, Yung-Shun Chen
  • Patent number: 6979654
    Abstract: A low k dielectric layer is formed on a surface of a substrate of a semiconductor wafer. Then, a surface treatment is performed to the low k dielectric layer to form a passivation layer on a surface of the low k dielectric layer. A patterned photoresist layer is formed over the surface of the semiconductor wafer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. Finally, a stripping process is performed to remove the patterned photoresist layer. The passivation layer is used to prevent deterioration of the dielectric characteristic of the low k dielectric layer during the stripping process.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: December 27, 2005
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Patent number: 6635967
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes forming a sacrificial polymer film over a substrate having metal lines thereon. A portion of the sacrificial polymer film is subsequently removed to form first spacers. A micro-porous structure layer is formed over the substrate and the metal lines and between the first spacers. A portion of the micro-porous structure layer is removed to form second spacers. The first spacers are removed by thermal dissociation to form air gaps. A dielectric layer is formed over the substrate and the metal lines and between the second spacers.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: October 21, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Patent number: 6583067
    Abstract: The present invention is a method to avoid deterioration of a dielectric characteristic of a dielectric layer having a low dielectric constant (low k) during a stripping process. The method involves first forming a low k dielectric layer on the surface of a substrate of a semiconductor wafer. Then, a patterned photoresist layer is formed over the surface of the low k dielectric layer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. A stripping process is then performed to remove the patterned photoresist layer. Finally, a surface treatment is utilized on the low k dielectric layer to remove Si—OH bonds in the low k dielectric layer so as to avoid moisture absorption of the low k dielectric layer that causes deterioration of the dielectric characteristic.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: June 24, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Patent number: 6521547
    Abstract: A method of repairing a low dielectric constant (low k) material layer starts with coating a photoresist layer on the low k material layer on a semiconductor wafer. After transferring a pattern of the photoresist layer to the low k material layer, an oxygen plasma ashing process is performed to remove the photoresist layer. Finally, by contacting the low k material layer with a solution of alkyl silane comprising an alkyl group and halo substituent, Si—OH bonds formed in the low k layer during the oxygen plasma ashing process are removed so as to repair damage to the low k material layer caused by the oxygen plasma ashing process, and to enhance a surface of the low k material layer to a hydrophobic surface to prevent moisture adhering to the surface of the low k material layer.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: February 18, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20030013311
    Abstract: A low k dielectric layer is formed on a surface of a substrate of a semiconductor wafer. Then, a surface treatment is performed to the low k dielectric layer to form a passivation layer on a surface of the low k dielectric layer. A patterned photoresist layer is formed over the surface of the semiconductor wafer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. Finally, a stripping process is performed to remove the patterned photoresist layer. The passivation layer is used to prevent deterioration of the dielectric characteristic of the low k dielectric layer during the stripping process.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 16, 2003
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20030008518
    Abstract: The present invention is a method to avoid deterioration of a dielectric characteristic of a dielectric layer having a low dielectric constant (low k) during a stripping process. The method involves first forming a low k dielectric layer on the surface of a substrate of a semiconductor wafer. Then, a patterned photoresist layer is formed over the surface of the low k dielectric layer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. A stripping process is then performed to remove the patterned photoresist layer. Finally, a surface treatment is utilized on the low k dielectric layer to remove Si—OH bonds in the low k dielectric layer so as to avoid moisture absorption of the low k dielectric layer that causes deterioration of the dielectric characteristic.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 9, 2003
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20030008516
    Abstract: A low dielectric constant (low k) material layer is positioned on a semiconductor wafer. A first hydrogen-containing plasma treatment is performed to reinforce a surface of the low k material layer against corrosion caused by a photoresist stripper. A photoresist layer, having an opening in the photoresist layer to expose portions of the low k material layer, is then coated on the low k material layer. By dry etching the low k material layer through the opening, a pattern in the photoresist layer is transferred to the low k material layer. An ashing process with an oxygen plasma supply is then performed to ash the photoresist layer. Finally, the semiconductor wafer is dipped in a wet stripper to completely remove the photoresist layer.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 9, 2003
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Patent number: 6498070
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes forming a sacrificial polymer film over a substrate having metal lines thereon. A portion of the sacrificial polymer film is subsequently removed to form first spacers. A micro-porous structure layer is formed over the substrate and the metal lines and between the first spacers. A portion of the micro-porous structure layer is removed to form second spacers. The first spacers are removed by thermal dissociation to form air gaps. A dielectric layer is formed over the substrate and the metal lines and between the second spacers.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: December 24, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Publication number: 20020164868
    Abstract: A method for forming silicon dioxide-low k dielectric stack is provided. The present invention is characterized in that applying H2 plasma on a low k dielectric layer formed on a conductive interconnect layer to cover dangling bonds on the surface of the low k dielectric layer. Thereby, preventing the reaction between the low k dielectric layer and oxygen gas employed in a subsequent process for forming a cap layer of silicon dioxide occurring, and thus prohibiting oxygen gas damaging the low k dielectric layer.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 7, 2002
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Patent number: 6423652
    Abstract: A post-processing treatment of a low dielectric constant material. In the post-processing treatment, a shallow implantation is conducted to form a shallow compact layer over a dielectric film. This shallow compact surface layer acts as a barrier that prevents the absorption of moisture by the dielectric film. The shallow implantation is carried out using boron ions at an energy level of between about 10 and 50 keV and a dosage of between about 1×1015 atm/cm2 and 1×1016 atm/cm2.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: July 23, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20020090794
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes forming a sacrificial polymer film over a substrate having metal lines thereon. A portion of the sacrificial polymer film is subsequently removed to form first spacers. A micro-porous structure layer is formed over the substrate and the metal lines and between the first spacers. A portion of the micro-porous structure layer is removed to form second spacers. The first spacers are removed by thermal dissociation to form air gaps. A dielectric layer is formed over the substrate and the metal lines and between the second spacers.
    Type: Application
    Filed: March 18, 2002
    Publication date: July 11, 2002
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Patent number: 6316347
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes providing a substrate having metallic lines thereon. A high molecular weight sacrificial film is formed over the substrate. A portion of the high molecular weight sacrificial layer is removed to form spacers. A dielectric layer is formed over the substrate, the top surface of the metallic lines and the spacers. Finally, a thermal dissociation operation is conducted to remove the spacers, thereby forming an air pocket on each sidewall of the metallic lines.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: November 13, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Publication number: 20010007788
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes forming a sacrificial polymer film over a substrate having metal lines thereon. A portion of the sacrificial polymer film is subsequently removed to form first spacers. A micro-porous structure layer is formed over the substrate and the metal lines and between the first spacers. A portion of the micro-porous structure layer is removed to form second spacers. The first spacers are removed by thermal dissociation to form air gaps. A dielectric layer is formed over the substrate and the metal lines and between the second spacers.
    Type: Application
    Filed: January 17, 2001
    Publication date: July 12, 2001
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu