Patents by Inventor Yi Yang

Yi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103577
    Abstract: In one example, an electronic device may include a main body, and a back cover having an opening. The back cover may include an inner surface, and a hook protruding from the inner surface. The hook may be engageable with a receiving portion of the main body to slidably couple the back cover to the main body. Further, electronic device may include a component housing connected to the main body through the opening in the back cover to fixedly couple the back cover to the main body.
    Type: Application
    Filed: November 5, 2019
    Publication date: March 28, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Cheng-Yi Yang, Szu Tao Tong, Hai-Lung Hung
  • Patent number: 11941213
    Abstract: A touch structure and a display panel are provided. The touch structure includes: first mesh electrodes extending in a first direction and second mesh electrodes extending in a second direction. The touch structure is absent in a window region. First mesh electrodes include at least one cross-window row separated by the window region, which includes a first cross-window row including: a first window mesh block adjacent to the window region and on a first side of the window region; a first conductive plate directly connected to mesh lines of the first window mesh block; and a first non-window mesh block on a side of the first window mesh block away from the window region; second mesh electrodes include at least one cross-window column including a first cross-window column which includes: a second window mesh block; a second conductive plate; and a second non-window mesh block.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Wang, Yi Zhang, Fuqiang Yang, Chao Zeng
  • Patent number: 11944017
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: 11943767
    Abstract: Wireless communications systems and methods related to negative acknowledgement (NACK)-triggered sounding reference signal transmissions are provided. In some aspects, a user equipment may detect an error when decoding a data transmission received from a base station via a bandwidth part. The UE may then trigger, in response to detecting the error, a transmission to the BS of a first sounding resource signal using a first SRS resource set of the bandwidth part.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Yi Huang, Ahmed Elshafie, Hwan Joon Kwon, Krishna Kiran Mukkavilli
  • Patent number: 11939674
    Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 1:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: March 26, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Yi Yang, Krishna Nittala, Karthik Janakiraman, Aykut Aydin, Diwakar Kedlaya
  • Patent number: 11943166
    Abstract: In an example, a user equipment (UE) may receive, from a base station, a message indicating activation or reactivation of semi-persistent scheduling (SPS) between the UE and the base station. The UE may determine, based on the message, a first resource for transmitting a first acknowledgement/negative-acknowledgement (ACK/NACK) to acknowledge reception of the message. The UE may also receive, from the base station and subsequent to the receiving of the message, an SPS message. The UE may also determine a second resource for transmitting a second ACK/NACK to acknowledge reception of the SPS message. The UE may also transmit, to the base station, the first ACK/NACK on the first resource and the second ACK/NACK on the second resource.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Yi Huang, Wei Yang, Peter Gaal, Seyedkianoush Hosseini
  • Patent number: 11943018
    Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) having partially coherent antennas may be configured for simultaneous transmissions on groups of antennas. To achieve the benefits of simultaneous transmissions using groups of antenna that are partially coherent, without having the transmissions affect each other, the UE may apply a hybrid closed-loop multiple-input multiple-output (MIMO) scheme among each antenna in the antenna groups where phase coherence can be maintained. Following the hybrid closed-loop MIMO scheme, the UE may apply a transparent diversity scheme across each antenna of the groups. Alternatively, the UE may first apply the transparent diversity scheme and next apply the hybrid closed-loop MIMO scheme. By applying a hybrid closed-loop MIMO scheme, and a transparent diversity scheme, the UE may fully realize its resources and contribute to an improved spatial diversity for a MIMO system.
    Type: Grant
    Filed: January 27, 2023
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Yi Huang, Gokul Sridharan, Wei Yang, Taesang Yoo, Peter Gaal
  • Patent number: 11942398
    Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li Yang, Wen-Hsiung Lu, Jhao-Yi Wang, Fu Wei Liu, Chin-Yu Ku
  • Patent number: 11943805
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may select a set (represented in a table), from among a plurality of sets (tables) that include beta offset factors associated with multiplexing uplink control information (UCI) with data on a physical uplink shared channel (PUSCH), based at least in part on a priority level of the UCI and a priority level of the data on the PUSCH. The UE may select a beta offset factor from the selected set according to a type of the UCI. The UE may multiplex the UCI with the data in an uplink communication on the PUSCH based at least in part on the selected beta offset factor. The UE may transmit the uplink communication. Numerous other aspects are provided.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Yi Huang, Wei Yang, Wanshi Chen, Peter Gaal
  • Patent number: 11942931
    Abstract: A switching circuit comprises a radio frequency (RF) switch, a gate resistor, a voltage source, a transmission gate, and coupling circuitry configured to couple a gate of the RF switch, a first side of the gate resistor, and the transmission gate at a first node and the voltage source, a second side of the gate resistor, and the transmission gate at a second node.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Lynn Yun Kong, Yi Yang, Bo Zhou
  • Publication number: 20240093143
    Abstract: Cell culture media, such as chemically defined cell culture media, are provided, as are methods of using the media for cell growth (i.e., cell culture) and polypeptide (e.g., antibody) production. Compositions comprising polypeptides produced by the methods are also provided.
    Type: Application
    Filed: October 30, 2023
    Publication date: March 21, 2024
    Applicant: GENENTECH, INC.
    Inventors: Natarajan Vijayasankaran, Steven J. Meier, Melissa S. Mun, Sharat Varma, Yi Yang, Boyan Zhang, Silvana R. Arevalo, Martin Gawlitzek, Veronica Carvalhal
  • Publication number: 20240099151
    Abstract: A first conductive layer is patterned and trimmed to form a sub 30 nm conductive via on a first bottom electrode. The conductive via is encapsulated with a first dielectric layer and planarized to expose a top surface of the conductive via. A second conductive layer is deposited over the first dielectric layer and the conductive via. The second conductive layer is patterned to form a sub 60 nm second conductive layer wherein the conductive via and second conductive layer together form a T-shaped second bottom electrode. MTJ stacks are deposited on the T-shaped second bottom electrode and on the first bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and planarized to expose a top surface of the MTJ stack on the T-shaped second bottom electrode. A top electrode contacts the MTJ stack on the T-shaped second bottom electrode plug.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Yi Yang, Dongna Shen, Yu-Jen Wang
  • Publication number: 20240098960
    Abstract: An integrated circuit structure in which a gate overlies channel region in an active area of a first transistor. The first transistor includes a channel region, a source region and a drain region. A conductive contact is coupled to the drain region of the first transistor. A second transistor that includes a channel region, a source region a drain region is adjacent to the first transistor. The gate of the second transistor is spaced from the gate of the first transistor. A conductive via passes through an insulation layer to electrically connect to the gate of the second transistor. An expanded conductive via overlays both the conductive contact and the conductive via to electrically connect the drain of the first transistor to the gate of the second transistor.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Inventors: YU-KUAN LIN, CHANG-TA YANG, PING-WEI WANG, KUO-YI CHAO, MEI-YUN WANG
  • Publication number: 20240094288
    Abstract: A circuit screening system including a target circuit under test receiving a first testing signal in a first period and a second testing signal in a second period; and a clock generating circuit providing a clock signal to the target circuit under test, the clock signal triggering the target circuit under test to receive the first testing signal in the first period and the second testing signal in the second period; the clock signal having a first profile and a second profile in the first period and the second period, respectively, and the first profile and the second profile having a phase difference.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Inventors: CHI-CHE WU, TSUNG-YANG HUNG, JIA-MING GUO, YI-NA FANG, MING-YIH WANG
  • Publication number: 20240093167
    Abstract: Provided are an esterase mutant and use thereof. The amino acid sequence of the esterase mutant has a sequence as shown in SEQ ID NO: 1, and sites at which amino acid mutations occur include an N51G site.
    Type: Application
    Filed: March 2, 2021
    Publication date: March 21, 2024
    Inventors: Hao Hong, James Gage, Yi Xiao, Na Zhang, Xuecheng Jiao, Yiming Yang, Xiang Wang, Junqi Zhao
  • Publication number: 20240099150
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240098612
    Abstract: A method for conditional handover (CHO). The method is performed by a terminal and includes: adjusting, based on a prediction value of a prediction parameter, a parameter of a CHO execution condition of a candidate cell to be evaluated of the terminal. The prediction parameter comprises at least one of: a movement and service characteristic parameter or a communication performance characteristic parameter of the terminal after the terminal accesses the candidate cell to be evaluated.
    Type: Application
    Filed: January 14, 2021
    Publication date: March 21, 2024
    Inventors: Yi XIONG, Xing YANG
  • Publication number: 20240096289
    Abstract: The disclosure provides a control method of a display driver. The control method includes receiving address information and defining an IC address according to the address information. The IC address includes n bits representing k zones, and n and k are positive integers. The control method further includes receiving the IC address, a black frame data signal and a pulse-width modulation (PWM) signal, and turning on or off the plurality of LEDs in the corresponding zone according to toggle of bit in the black frame data signal. Each bit in the black frame data signal indicates that a plurality of LEDs in a zone among the k zones are turned on or off.
    Type: Application
    Filed: February 13, 2023
    Publication date: March 21, 2024
    Applicant: Novatek Microelectronics Corp.
    Inventors: Yi-Yang Tsai, Hung-Ho Huang, Tzong-Honge Shieh, Chieh-An Lin, Po-Hsiang Fang, Jhih-Siou Cheng
  • Publication number: 20240091366
    Abstract: The present invention relates to the field of pharmaceutical and chemical engineering, and specifically relates to a weakly acidic microenvironment-sensitive aptamer for tumors, a triptolide conjugate. The conjugate is formed by conjugation between the 14-position hydroxyl group of triptolide and the aptamer via an acetal ester linking bond, which is an acid-sensitive linking bond with a cleavage condition of (pH=3.5-6.5), which is much less pH-sensitive and is more likely to cleave under the tumor microenvironment. Based on the characteristics of the aptamer targeting the highly expressed proteins on the membrane surface of tumor cells, the conjugate delivered triptolide targeted to tumor cells and mediated endocytosis to reach the lysosome; based on the characteristics of the acidic environment of lysosomes, the acetal ester linking bond released intact triptolide in the lysosomal acidic environment, targeting and killing of tumor cells.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: Jun LU, Yun DENG, Yao CHEN, Jirui YANG, Yi ZUO, Xiao LI, Qing REN
  • Publication number: 20240092922
    Abstract: This disclosure relates to anti-TNFRSF9 (tumor necrosis factor receptor superfamily member 9) antibodies, antigen-binding fragments, and the uses thereof.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 21, 2024
    Inventors: Yi Yang, Jingshu Xie, Chunyan Dong, Fang Yang, Chengyuan Lu, Yuelei Shen, Jian Ni, Yanan Guo, Yunyun Chen