Abstract: A pixel for an image sensor is disclosed that includes a photodiode, a thin-film layer and a reflective layer. The photodiode includes a first side and a second side that is opposite the first side, and receives incident light on the first side. The thin-film layer is formed on the first side of the photodiode and provides a unidirectional phase-shift to light passing from the photodiode to the thin-film layer. The thin-film layer has a refractive index that less than a refractive index of material forming the photodiode. The unidirectional phase-shift may be a unidirectional it phase shift at a target near-infrared light wavelength. The reflective layer is formed on the second side of the photodiode and reflects light passing from the photodiode to the reflective layer toward the first side of the photodiode. The reflective layer may be a thin-film layer, a Distributed Bragg Reflector layer, or a metal.

Abstract: A pixel for an image sensor includes a photon sensor, a memory, and an accumulator. The photon sensor element portion outputs a signal to an accumulator, which then may add value stored in memory together and may transfer the result to the memory of another pixel. The pixel may be analog or digital and may be used in a pixel array for compressed sensing imaging. During imaging, a pseudo-random mask may also be used. The data collected during imaging may be used in compressed sensing and may be sent to an offline storage to be processed.

Abstract: An image sensor includes a time-resolving sensor and a processor. The time-resolving sensor outputs a first signal and a second signal pair in response detecting one or more photons that have been reflected from an object. A first ratio of a magnitude of the first signal to a sum of the magnitude of the first signal and a magnitude of the second signal is proportional to a time of flight of the one or more detected photons. A second ratio of the magnitude of the second signal to the sum of the magnitude of the first signal and the magnitude of the second signal is proportional to the time of flight of the one or more detected photons. The processor determines a surface reflectance of the object where the light pulse has been reflected based on the first signal and the second signal pair and may generate a grayscale image.

Abstract: Two-dimensional (2D) color information and 3D-depth information are concurrently obtained from a 2D pixel array. The 2D pixel array is arranged in a first group of a plurality of rows. A second group of rows of the array are operable to generate 2D-color information and pixels of a third group of the array are operable to generate 3D-depth information. The first group of rows comprises a first number of rows, the second group of rows comprises a second number of rows that is equal to or less than the first number of rows, and the third group of rows comprises a third number of rows that is equal to or less than the second number of rows. In an alternating manner, 2D-color information is received from a row selected from the second group of rows and 3D-depth information is received from a row selected from the third group of rows.

Abstract: A computing device includes a system that authenticates a user of the computing device. A first sensor obtains a first representation of a physical characteristic of the user that is compared to a registered representation of the physical characteristic of the user. A first level of access to the computing device is enabled based on the first representation of the physical characteristic matching the second representation of the physical characteristic. A second sensor obtains a first representation of a liveness characteristic of the user that indicates that the user is alive. The first representation of the liveness characteristic is compared to a registered representation of the liveness characteristic of the user. A second level of access to the computing device is enabled based on the first representation of the liveness characteristic of the user matching the second representation of the liveness characteristic of the user.

Abstract: A pixel for an image sensor includes a photon sensor, a memory, and an accumulator. The photon sensor element portion outputs a signal to an accumulator, which then may add value stored in memory together and may transfer the result to the memory of another pixel. The pixel may be analog or digital and may be used in a pixel array for compressed sensing imaging. During imaging, a pseudo-random mask may also be used. The data collected during imaging may be used in compressed sensing and may be sent to an offline storage to be processed.

Abstract: A client device configured with a neural network includes a processor, a memory, a user interface, a communications interface, a power supply and an input device, wherein the memory includes a trained neural network received from a server system that has trained and configured the neural network for the client device. A server system and a method of training a neural network are disclosed.

Abstract: A camera system. In some embodiments, the camera system includes a first laser, a camera, and a processing circuit connected to the first laser and to the camera. The first laser may be steerable, and the camera may include a pixel including a photodetector and a pixel circuit, the pixel circuit including a first time-measuring circuit.

Abstract: A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.

Abstract: A surface coating configured to locally enhance ultraviolet light density of ultraviolet light incident on the surface coating. The surface coating includes a dielectric layer, a conductive layer on the dielectric layer, a series of nano-openings in the dielectric layer and the conductive layer, a series of nano-antennae in the series of nano-openings, and a dielectric gap between the series of nano-antennas and the conductive layer. The conductive layer and the nano-antennae both include a UV plasmonic material.

Abstract: A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.

Abstract: A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.

Abstract: A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.

Abstract: A neural processor. In some embodiments, the processor includes a first tile, a second tile, a memory, and a bus. The bus may be connected to the memory, the first tile, and the second tile. The first tile may include: a first weight register, a second weight register, an activations buffer, a first multiplier, and a second multiplier. The activations buffer may be configured to include: a first queue connected to the first multiplier and a second queue connected to the second multiplier. The first queue may include a first register and a second register adjacent to the first register, the first register being an output register of the first queue. The first tile may be configured: in a first state: to multiply, in the first multiplier, a first weight by an activation from the output register of the first queue, and in a second state: to multiply, in the first multiplier, the first weight by an activation from the second register of the first queue.

Abstract: A time-resolving sensor includes a single-photon avalanche diode (SPAD), a logic circuit and differential time-to-charge converter (DTCC) circuit. The SPAD is responsive to a shutter signal to generate an output signal based on detecting an incident photon. The logic circuit generates first and second enable signals. The DTCC includes a capacitor device, first and second switching devices, and an output circuit. The first switching device is responsive to the first enable signal to transfer a charge on the capacitor device to the first floating diffusion. The second switching device is responsive to the second enable signal to transfer a remaining charge on the capacitor device to the second floating diffusion. The output circuit outputs a first voltage that is based on the first charge on the first floating diffusion and a second voltage that is based on the second charge on the second floating diffusion.

Abstract: A system and a method determines a traveling time for a light pulse between a light pulse source and a pixel of a light sensor array based on a “Find Frequent Items in a Data Steam” technique. In one embodiment, raw timestamp data output from a pixel as a data stream may be temporarily stored, processed twice and then discarded to provide an exact determination of a traveling time estimate. In another embodiment, the raw timestamp data is processed once and discarded to provide an approximate determination of a traveling time estimate. The traveling time estimate may be updated during processing and the most-frequently occurring timestamp is available when processing the data stream is complete. There is no need to keep the raw data in a memory, thereby reducing the memory requirement associated with determining the traveling time of a light pulse.

Abstract: Using the same image sensor to capture a two-dimensional (2D) image and three-dimensional (3D) depth measurements for a 3D object. A laser point-scans the surface of the object with light spots, which are detected by a pixel array in the image sensor to generate the 3D depth profile of the object using triangulation. Each row of pixels in the pixel array forms an epipolar line of the corresponding laser scan line. Timestamping provides a correspondence between the pixel location of a captured light spot and the respective scan angle of the laser to remove any ambiguity in triangulation. An Analog-to-Digital Converter (ADC) in the image sensor operates as a Time-to-Digital (TDC) converter to generate timestamps. A timestamp calibration circuit is provided on-board to record the propagation delay of each column of pixels in the pixel array and to provide necessary corrections to the timestamp values generated during 3D depth measurements.

Abstract: An imaging unit includes a light source and a pixel array. The light source projects a line of light that is scanned in a first direction across a field of view of the light source. The line of light oriented in a second direction that is substantially perpendicular to the first direction. The pixel array is arranged in at least one row of pixels that extends in a direction that is substantially parallel to the second direction. At least one pixel in a row is capable of generating two-dimensional color information of an object in the field of view based on a first light reflected from the object and is capable of generating three-dimensional (3D) depth information of the object based on the line of light reflecting from the object. The 3D-depth information includes time-of-flight information.

Abstract: A system for calculating. A scratch memory is connected to a plurality of configurable processing elements by a communication fabric including a plurality of configurable nodes. The scratch memory sends out a plurality of streams of data words. Each data word is either a configuration word used to set the configuration of a node or of a processing element, or a data word carrying an operand or a result of a calculation. Each processing element performs operations according to its current configuration and returns the results to the communication fabric, which conveys them back to the scratch memory.

Abstract: A metalens includes one or more regions of nanostructures. A first region of nanostructures directs a first field of view (FOV) of light incident on the first region of nanostructures to a first region of an image plane. A second region of nanostructures directs a second FOV of light incident on the second region of nanostructures to a second region of the image plane in which the second FOV is different from the first FOV, and the second region of the image plane is different from the first region of the image plane. A third region of nanostructures directs a third FOV of light to a third region of the image plane, in which the third FOV is different from the first FOV and the second FOV, and the third region of the image plane is different from the first region and the second region of the image plane.