Abstract: In some embodiments, the present disclosure relates to an image sensor, including a first photodiode and a second photodiode disposed in a semiconductor substrate. A floating diffusion node is disposed along a frontside of the semiconductor substrate and between the first and second photodiodes. A partial backside deep trench isolation (BDTI) structure is disposed within the semiconductor substrate and between the first and second photodiodes. The partial BDTI extends from a backside of the semiconductor substrate and is spaced from the floating diffusion node. A full BDTI structure extends from the backside of the semiconductor substrate to the frontside of the semiconductor substrate.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: A method for forming a semiconductor image sensor includes: providing a first substrate including a first front side and a first back side opposite to the first front side, and the first substrate including a plurality of first sensing devices; bonding the first substrate to a second substrate including a second front side and a second back side opposite to the second front side with the first front side of the first substrate facing the second front side of the second substrate; disposing an insulating structure over the first back side of the first substrate, wherein the insulating structure includes a plurality of dielectric grating patterns; and bonding the first substrate to a third substrate including a third front side and a third back opposite to the third front side, and the third substrate including a plurality of second sensing devices.

Abstract: In some embodiments, the present disclosure relates to an image sensor, including a first photodiode and a second photodiode disposed in a semiconductor substrate. A floating diffusion node is disposed along a frontside of the semiconductor substrate and between the first and second photodiodes. A partial backside deep trench isolation (BDTI) structure is disposed within the semiconductor substrate and between the first and second photodiodes. The partial BDTI extends from a backside of the semiconductor substrate and is spaced from the floating diffusion node. A full BDTI structure extends from the backside of the semiconductor substrate to the frontside of the semiconductor substrate.

Abstract: An image sensor structure and manufacturing method thereof are provided. The image sensor structure includes a substrate with a first surface. A first doped region of a first conductivity type is in the substrate and under the first surface. A second doped region of a second conductivity type is in the substrate and under the first surface. A gate structure is on the first surface of the substrate and overlapping a boundary of the first doped region and the second doped region. The epitaxial structure is on the first surface of the substrate. A method for manufacturing an image sensor structure is also provided.

Abstract: A cardiac patch for treatment of a mammalian heart including perfusable vessels embedded integratedly between two layers of anisotropically oriented myocardial fibers. The cardiac patch is made using a dual 3D bioprinting technique using stereolithography to form an anisotropic construct and extrusion printing to form perfusion vessels. A nutrient and oxygen containing media can be provided within the perfusion vessels for growth of cells in the cardiac patch. The technique permits larger patches to be made for the treatment of cardiac damage in both small and large mammalian hearts.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: An image sensor is disclosed. The image sensor includes an epitaxial layer, a plurality of plug structures and an interconnect structure. Wherein the plurality of plug structures are formed in the epitaxial layer, and each plug structure has doped sidewalls, the epitaxial layer and the doped sidewalk form a plurality of photodiodes, the plurality of plug structures are used to separate adjacent photodiodes, and the epitaxial layer and the doped sidewalls are coupled to the interconnect structure via the plug structures. An associated method of fabricating the image sensor is also disclosed. The method includes: providing a substrate having a first-type doped epitaxial substrate layer on a second-type doped epitaxial substrate layer; forming a plurality of isolation trenches in the first-type doped epitaxial substrate layer; forming a second-type doped region along sidewalk and bottoms of the plurality of isolation trenches; and filling the plurality of isolation trenches by depositing metal.

Abstract: The present disclosure provides an automatic exposure control method, including: providing an object to be tested; providing an image sensor, including a photosensitive element array composed of a plurality of photosensitive elements arranged in an array, and the photosensitive element array includes at least a plurality of first photosensitive elements and a plurality of second photosensitive elements; turning on the radiation source, and the first readout signals on the first photosensitive elements are read after exposing the area to be tested for the first preset time; continuing the exposure for the second preset time, turning off the photosensitive elements and reading the second readout signals on the second photosensitive elements; acquiring the preset dose threshold of the area to be tested based on the second and first readout signals, and obtaining the remaining time to reach the preset radiation dose to control the exposure of the radiation source.

Abstract: Methods and apparatus for polysilicon MOS capacitors in a replacement gate process. A method includes disposing a gate dielectric layer over a semiconductor substrate; disposing a polysilicon gate layer over the dielectric layer; patterning the gate dielectric layer and the polysilicon gate layer to form a plurality of polysilicon gates spaced by at least a minimum polysilicon to polysilicon pitch; defining a polysilicon resistor region containing at least one of the polysilicon gates and not containing at least one other of the polysilicon gates, which form dummy gates; depositing a mask layer over an inter-level dielectric layer; patterning the mask layer to expose the dummy gates; removing the dummy gates and the gate dielectric layer underneath the dummy gates to leave trenches in the inter-level dielectric layer; and forming high-k metal gate devices in the trenches in the inter-level dielectric layer. An apparatus produced by the method is disclosed.

Abstract: An image sensor is disclosed. The image sensor includes an epitaxial layer, a plurality of plug structures and an interconnect structure. Wherein the plurality of plug structures are formed in the epitaxial layer, and each plug structure has doped sidewalls, the epitaxial layer and the doped sidewalls form a plurality of photodiodes, the plurality of plug structures are used to separate adjacent photodiodes, and the epitaxial layer and the doped sidewalls are coupled to the interconnect structure via the plug structures. An associated method of fabricating the image sensor is also disclosed. The method includes: providing a substrate having a first-type doped epitaxial substrate layer on a second-type doped epitaxial substrate layer; forming a plurality of isolation trenches in the first-type doped epitaxial substrate layer; forming a second-type doped region along sidewalls and bottoms of the plurality of isolation trenches; and filling the plurality of isolation trenches by depositing metal.

Abstract: In some embodiments, the present disclosure relates to an image sensor, including a first photodiode and a second photodiode disposed in a semiconductor substrate. A floating diffusion node is disposed along a frontside of the semiconductor substrate and between the first and second photodiodes. A partial backside deep trench isolation (BDTI) structure is disposed within the semiconductor substrate and between the first and second photodiodes. The partial BDTI extends from a backside of the semiconductor substrate and is spaced from the floating diffusion node. A full BDTI structure extends from the backside of the semiconductor substrate to the frontside of the semiconductor substrate.

Abstract: A system and a method for predicting and optimizing remaining hardware life of gas turbine components. Operating parameters of the gas turbine which may impact remaining hardware life are sensed and tracked using a plurality of sensors in communication with a control system including a computing device. Remaining hardware life is predicted using a physics-based hardware lifing model. The hardware lifing model may include an output of a filtration model configured to monitor contaminants based on a pressure drop across a filter. Optimizing the remaining hardware life is achieved by the control system adjusting one or more operation settings of the gas turbine.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a dielectric structure disposed over a substrate. A plurality of conductive interconnect layers are disposed within the dielectric structure. The plurality of conductive interconnect layers include alternating layers of interconnect wires and interconnect vias. A metal-insulating-metal (MIM) capacitor is arranged within the dielectric structure. The MIM capacitor has a lower conductive electrode separated from an upper conductive electrode by a capacitor dielectric structure. The MIM capacitor vertically extends past two or more of the plurality of conductive interconnect layers.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an image sensing element disposed within a pixel region of a substrate. A plurality of conductive interconnect layers are disposed within a dielectric structure arranged along a first side of the substrate. A second side of the substrate includes a plurality of interior surfaces arranged directly over the image sensing element. The plurality of interior surfaces respectively include a substantially flat surface that extends along a plane.

Abstract: A method for forming a semiconductor image sensor includes: providing a first substrate including a first front side and a first back side opposite to the first front side, and the first substrate including a plurality of first sensing devices; bonding the first substrate to a second substrate including a second front side and a second back side opposite to the second front side with the first front side of the first substrate facing the second front side of the second substrate; disposing an insulating structure over the first back side of the first substrate, wherein the insulating structure includes a plurality of dielectric grating patterns; and bonding the first substrate to a third substrate including a third front side and a third back opposite to the third front side, and the third substrate including a plurality of second sensing devices.

Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.

Abstract: Methods and apparatus for polysilicon MOS capacitors in a replacement gate process. A method includes disposing a gate dielectric layer over a semiconductor substrate; disposing a polysilicon gate layer over the dielectric layer; patterning the gate dielectric layer and the polysilicon gate layer to form a plurality of polysilicon gates spaced by at least a minimum polysilicon to polysilicon pitch; defining a polysilicon resistor region containing at least one of the polysilicon gates and not containing at least one other of the polysilicon gates, which form dummy gates; depositing a mask layer over an inter-level dielectric layer; patterning the mask layer to expose the dummy gates; removing the dummy gates and the gate dielectric layer underneath the dummy gates to leave trenches in the inter-level dielectric layer; and forming high-k metal gate devices in the trenches in the inter-level dielectric layer. An apparatus produced by the method is disclosed.

Abstract: A semiconductor image sensor includes a first substrate including a first front side and a first back side, a first interconnect structure disposed over the first front side of the first substrate, a second substrate including a second front side and a second back side, a second interconnect structure disposed over the second front side of the second substrate, a third substrate including a third front side and a third back side, and a third interconnect structure disposed over the third front side of the third substrate. The first substrate includes a plurality of first sensing devices, and the second substrate includes a plurality of second sensing devices. The second back side of the second substrate faces the first front side of the first substrate, and the second front side of the second substrate faces the third front side of the third substrate.

Abstract: Methods and apparatus for polysilicon MOS capacitors in a replacement gate process. A method includes disposing a gate dielectric layer over a semiconductor substrate; disposing a polysilicon gate layer over the dielectric layer; patterning the gate dielectric layer and the polysilicon gate layer to form a plurality of polysilicon gates spaced by at least a minimum polysilicon to polysilicon pitch; defining a polysilicon resistor region containing at least one of the polysilicon gates and not containing at least one other of the polysilicon gates, which form dummy gates; depositing a mask layer over an inter-level dielectric layer; patterning the mask layer to expose the dummy gates; removing the dummy gates and the gate dielectric layer underneath the dummy gates to leave trenches in the inter-level dielectric layer; and forming high-k metal gate devices in the trenches in the inter-level dielectric layer. An apparatus produced by the method is disclosed.