Patents by Inventor Yoichi SUTO

Yoichi SUTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • VOLTAGE MONITORING DEVICE
    Publication number: 20220283204
    Abstract: A voltage monitoring device 2 includes: a comparator circuit 31; a state determination circuit 32; a pulse pattern setting circuit 33; an output circuit 36; a VDD port 21; a VSS port 22; an input port 24; and an output port 23. The comparator circuit 31 is connected to the state determination circuit 32. The state determination circuit 32 is connected to the pulse pattern setting circuit 33. The pulse pattern setting circuit is connected to the output port 23 via the output circuit 36.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 8, 2022
    Applicant: ABLIC Inc.
    Inventors: Yoichi SUTO, Atsushi SAKURAI
  • Voltage-current conversion circuit and charge-discharge control device
    Patent number: 11042177
    Abstract: A voltage-current conversion circuit includes a voltage-current conversion resistor connected to an input terminal, and a current mirror circuit which mirrors a current supplied from the voltage-current conversion resistor, wherein the current mirror circuit is constructed to include a depletion-type transistor whose source voltage is biased to be higher than the substrate voltage.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: June 22, 2021
    Assignee: ABLIC INC.
    Inventors: Yusuke Kanazawa, Yoichi Suto
  • VOLTAGE-CURRENT CONVERSION CIRCUIT AND CHARGE-DISCHARGE CONTROL DEVICE
    Publication number: 20200401171
    Abstract: A voltage-current conversion circuit includes a voltage-current conversion resistor connected to an input terminal, and a current mirror circuit which mirrors a current supplied from the voltage-current conversion resistor, wherein the current mirror circuit is constructed to include a depletion-type transistor whose source voltage is biased to be higher than the substrate voltage.
    Type: Application
    Filed: June 16, 2020
    Publication date: December 24, 2020
    Inventors: Yusuke KANAZAWA, Yoichi SUTO